0.18/spl mu/m CMOS中的g/sub - boost -电流复用LNA

J. Walling, Sudip Shekhar, D. Allstot
{"title":"0.18/spl mu/m CMOS中的g/sub - boost -电流复用LNA","authors":"J. Walling, Sudip Shekhar, D. Allstot","doi":"10.1109/RFIC.2007.380958","DOIUrl":null,"url":null,"abstract":"Demand for fully-integrated RF circuits offering low power consumption continues to grow, along with a strong desire for high performance. In this paper a design that enhances the performance of the common-gate LNA is detailed. The noise performance is improved through the use of a gm-boosting technique, while the gain performance is improved using current-reuse techniques. The proposed solution alleviates the issues related to the common-source-common-source current-reuse topologies. The technique is validated with a design in 0.18 mum CMOS, with a 5.4 GHz LNA which achieves >20 dB of gain, <3 dB NF and consumes only 2.7 mW of power.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":"{\"title\":\"A g/sub m/-Boosted Current-Reuse LNA in 0.18/spl mu/m CMOS\",\"authors\":\"J. Walling, Sudip Shekhar, D. Allstot\",\"doi\":\"10.1109/RFIC.2007.380958\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Demand for fully-integrated RF circuits offering low power consumption continues to grow, along with a strong desire for high performance. In this paper a design that enhances the performance of the common-gate LNA is detailed. The noise performance is improved through the use of a gm-boosting technique, while the gain performance is improved using current-reuse techniques. The proposed solution alleviates the issues related to the common-source-common-source current-reuse topologies. The technique is validated with a design in 0.18 mum CMOS, with a 5.4 GHz LNA which achieves >20 dB of gain, <3 dB NF and consumes only 2.7 mW of power.\",\"PeriodicalId\":356468,\"journal\":{\"name\":\"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium\",\"volume\":\"66 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2007.380958\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2007.380958","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 33

摘要

对提供低功耗的全集成射频电路的需求持续增长,同时对高性能的强烈需求也在不断增长。本文详细介绍了一种提高共门LNA性能的设计方案。通过使用gm增强技术改善了噪声性能,而使用电流复用技术改善了增益性能。提出的解决方案缓解了与公共源-公共源当前-重用拓扑相关的问题。该技术在0.18 μ m CMOS设计中得到验证,其5.4 GHz LNA实现了>20 dB增益,<3 dB NF,功耗仅为2.7 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
A g/sub m/-Boosted Current-Reuse LNA in 0.18/spl mu/m CMOS
Demand for fully-integrated RF circuits offering low power consumption continues to grow, along with a strong desire for high performance. In this paper a design that enhances the performance of the common-gate LNA is detailed. The noise performance is improved through the use of a gm-boosting technique, while the gain performance is improved using current-reuse techniques. The proposed solution alleviates the issues related to the common-source-common-source current-reuse topologies. The technique is validated with a design in 0.18 mum CMOS, with a 5.4 GHz LNA which achieves >20 dB of gain, <3 dB NF and consumes only 2.7 mW of power.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Compact 5GHz Standing-Wave Resonator-based VCO in 0.13/spl mu/m CMOS A Sub-10mW 2Mbps BFSK Transceiver at 1.35 to 1.75GHz Built-in Self Testing of a DRP-Based GSM Transmitter A 0.13-/spl mu/m CMOS Digital Phase Shifter for K-band Phased Arrays Experimental Characterization of the Effect of Metal Dummy Fills on Spiral Inductors
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1