{"title":"用于视频应用的8位两步闪存A/D转换器","authors":"A. Cremonesi, F. Maloberti, G. Torelli, C. Vacchi","doi":"10.1109/CICC.1989.56700","DOIUrl":null,"url":null,"abstract":"A novel configuration for two-step analog-to-digital (A/D) flash conversion is described. The coarse and fine conversions are performed with a four-bit multiplexed flash converter, so only 15 comparators are necessary for an eight-bit converter. The D/A conversion and the subtraction required for the circuit operation are performed using the charge redistribution technique. A test chip, integrated with a 3-μm CMOS technology (area=3 mm2), has demonstrated the effectiveness of the proposed configuration","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"An 8-bit two-step flash A/D converter for video applications\",\"authors\":\"A. Cremonesi, F. Maloberti, G. Torelli, C. Vacchi\",\"doi\":\"10.1109/CICC.1989.56700\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel configuration for two-step analog-to-digital (A/D) flash conversion is described. The coarse and fine conversions are performed with a four-bit multiplexed flash converter, so only 15 comparators are necessary for an eight-bit converter. The D/A conversion and the subtraction required for the circuit operation are performed using the charge redistribution technique. A test chip, integrated with a 3-μm CMOS technology (area=3 mm2), has demonstrated the effectiveness of the proposed configuration\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56700\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56700","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An 8-bit two-step flash A/D converter for video applications
A novel configuration for two-step analog-to-digital (A/D) flash conversion is described. The coarse and fine conversions are performed with a four-bit multiplexed flash converter, so only 15 comparators are necessary for an eight-bit converter. The D/A conversion and the subtraction required for the circuit operation are performed using the charge redistribution technique. A test chip, integrated with a 3-μm CMOS technology (area=3 mm2), has demonstrated the effectiveness of the proposed configuration
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