{"title":"在先进的HKMG SOI技术上迈出下一步-从32nm PD SOI量产到28nm FD SOI及以上","authors":"M. Horstmann, J. Hoentschel, J. Schaeffer","doi":"10.1109/SOI.2012.6404364","DOIUrl":null,"url":null,"abstract":"A foundry's mission is to deliver competitive device performance and flexibility to support a variety of SoC offerings. The restrictive lithography and process requirements at the 20nm technology limit harvesting the density and scaling benefits of the gate first approach and drive the concept change to gate last processing. This technology pushes conventional scaling to its challenging limits. Beyond 20nm new device concepts need to be employed where FinFETs and ET-SOI devices serving well candidates for new advanced CMOS technologies.","PeriodicalId":306839,"journal":{"name":"2012 IEEE International SOI Conference (SOI)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Taking the next step on advanced HKMG SOI technologies — From 32nm PD SOI volume production to 28nm FD SOI and beyond\",\"authors\":\"M. Horstmann, J. Hoentschel, J. Schaeffer\",\"doi\":\"10.1109/SOI.2012.6404364\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A foundry's mission is to deliver competitive device performance and flexibility to support a variety of SoC offerings. The restrictive lithography and process requirements at the 20nm technology limit harvesting the density and scaling benefits of the gate first approach and drive the concept change to gate last processing. This technology pushes conventional scaling to its challenging limits. Beyond 20nm new device concepts need to be employed where FinFETs and ET-SOI devices serving well candidates for new advanced CMOS technologies.\",\"PeriodicalId\":306839,\"journal\":{\"name\":\"2012 IEEE International SOI Conference (SOI)\",\"volume\":\"53 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International SOI Conference (SOI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.2012.6404364\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International SOI Conference (SOI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2012.6404364","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Taking the next step on advanced HKMG SOI technologies — From 32nm PD SOI volume production to 28nm FD SOI and beyond
A foundry's mission is to deliver competitive device performance and flexibility to support a variety of SoC offerings. The restrictive lithography and process requirements at the 20nm technology limit harvesting the density and scaling benefits of the gate first approach and drive the concept change to gate last processing. This technology pushes conventional scaling to its challenging limits. Beyond 20nm new device concepts need to be employed where FinFETs and ET-SOI devices serving well candidates for new advanced CMOS technologies.