A. Heinig, Muhammad Waqas Chaudhary, P. Schneider, P. Ramm, J. Weber
{"title":"弗劳恩霍夫目前和未来的3D活动","authors":"A. Heinig, Muhammad Waqas Chaudhary, P. Schneider, P. Ramm, J. Weber","doi":"10.1109/3DIC.2015.7334466","DOIUrl":null,"url":null,"abstract":"In this presentation we will show different manufacturing approaches for TSVs which results in different shapes and dimensions. For example, geometries for tungsten filled very small TSVs (smaller than 5um) into very thin 2D chips (under 50um thickness) are shown. Also different assembly technologies for the mounting of the different chips to 2.5D and real 3D systems are explained. The usage of such 2.5 or 3D integrated systems in real world examples for high bandwidth processor memory communications are demonstrated.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Current and future 3D activities at Fraunhofer\",\"authors\":\"A. Heinig, Muhammad Waqas Chaudhary, P. Schneider, P. Ramm, J. Weber\",\"doi\":\"10.1109/3DIC.2015.7334466\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this presentation we will show different manufacturing approaches for TSVs which results in different shapes and dimensions. For example, geometries for tungsten filled very small TSVs (smaller than 5um) into very thin 2D chips (under 50um thickness) are shown. Also different assembly technologies for the mounting of the different chips to 2.5D and real 3D systems are explained. The usage of such 2.5 or 3D integrated systems in real world examples for high bandwidth processor memory communications are demonstrated.\",\"PeriodicalId\":253726,\"journal\":{\"name\":\"2015 International 3D Systems Integration Conference (3DIC)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 International 3D Systems Integration Conference (3DIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/3DIC.2015.7334466\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International 3D Systems Integration Conference (3DIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/3DIC.2015.7334466","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this presentation we will show different manufacturing approaches for TSVs which results in different shapes and dimensions. For example, geometries for tungsten filled very small TSVs (smaller than 5um) into very thin 2D chips (under 50um thickness) are shown. Also different assembly technologies for the mounting of the different chips to 2.5D and real 3D systems are explained. The usage of such 2.5 or 3D integrated systems in real world examples for high bandwidth processor memory communications are demonstrated.
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