J. Victory, Zeqin Zhu, Q. Zhou, Wei-Shan Wu, G. Gildenblat, Zhixin Yan, J. Cordovez, C. McAndrew, F. Anderson, J. Paasschens, R. V. Langevelde, P. Kolev, R. Cherne, C. Yao
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A physically based scalable model for MOS Varactors is presented. The model includes a PSP-based analytical surface potential charge formulation, MOS varactor specific gate current models, and physical geometry and process parameter based parasitic modeling. Key device performances of capacitance and quality factor Q are validated over voltage, frequency, and geometry, for several technologies. The model, implemented in Verilog-A, provides robust and accurate RF simulation of MOS varactors. A VCO design application is detailed.
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