B. Kertis, G. Costakis, J. Jensen, J. Zeiter, J. Rickard, M. Pusztai, T. Bowman
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引用次数: 3
摘要
描述了一种采用0.8 μ m BiCMOS技术制造的1mb ECL(发射极耦合逻辑)I/O SRAM。通过键合选项，该模具可配置为四种不同的组织(1mb×1, 1mb×1带差分输出，512k×2带差分输出，256k×4)。该器件的芯片尺寸为240密耳(475密耳)，典型存取时间为6.8 ns，可与金属选项兼容10 K或100 K I/O
A 1-Mb ECL (emitter coupled logic) I/O SRAM which has been fabricated using 0.8-μm BiCMOS technology is described. The die is configurable to four different organizations (1 Mb×1, 1 Mb×1 with differential output, 512 K×2 with differential output, and 256 K×4) by way of bonding options. The device, with a die size of 240 mil×475 mil, has a typical access time of 6.8 ns and is 10 K or 100 K I/O compatible with a metal option
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