{"title":"内置自检多阈值NULL约定逻辑异步电路","authors":"Brett Sparkman, S. Smith, J. Di","doi":"10.1109/VTS48691.2020.9107627","DOIUrl":null,"url":null,"abstract":"While a number of methods exist for asynchronous circuit synthesis, there are limited applicable test methodologies. This paper presents a Built-In Self-Test (BIST) method for Multi-Threshold NULL Convention Logic (MTNCL) asynchronous circuits, which utilizes standard synchronous tools, and is automated to achieve maximum fault coverage while minimizing area overhead and test time.","PeriodicalId":326132,"journal":{"name":"2020 IEEE 38th VLSI Test Symposium (VTS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits\",\"authors\":\"Brett Sparkman, S. Smith, J. Di\",\"doi\":\"10.1109/VTS48691.2020.9107627\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"While a number of methods exist for asynchronous circuit synthesis, there are limited applicable test methodologies. This paper presents a Built-In Self-Test (BIST) method for Multi-Threshold NULL Convention Logic (MTNCL) asynchronous circuits, which utilizes standard synchronous tools, and is automated to achieve maximum fault coverage while minimizing area overhead and test time.\",\"PeriodicalId\":326132,\"journal\":{\"name\":\"2020 IEEE 38th VLSI Test Symposium (VTS)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 38th VLSI Test Symposium (VTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS48691.2020.9107627\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 38th VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS48691.2020.9107627","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Built-In Self-Test for Multi-Threshold NULL Convention Logic Asynchronous Circuits
While a number of methods exist for asynchronous circuit synthesis, there are limited applicable test methodologies. This paper presents a Built-In Self-Test (BIST) method for Multi-Threshold NULL Convention Logic (MTNCL) asynchronous circuits, which utilizes standard synchronous tools, and is automated to achieve maximum fault coverage while minimizing area overhead and test time.