{"title":"微电子系统侧信道功率分析攻击防御","authors":"V. Sundaresan, S. Rammohan, R. Vemuri","doi":"10.1109/NAECON.2008.4806536","DOIUrl":null,"url":null,"abstract":"Side-channel power analysis attacks have become a potent threat to the security of embedded cryptographic devices in microelectronic systems. In this paper, we present an overview of the various side-channel power analysis attacks and defenses (countermeasures) against side-channel power analysis attacks. We introduce these countermeasures and present analyses based on security strength, ease of integration with EDA flows, and hardware characteristics like area, performance and power consumption. This paper is intended as a stepping stone towards developing more practical security-centric design methods that can be efficiently integrated with existing commercially viable designs and EDA flows, resulting in secure as well as hardware optimal implementations of side-channel power analysis attack resistant cryptographic devices.","PeriodicalId":254758,"journal":{"name":"2008 IEEE National Aerospace and Electronics Conference","volume":"600 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"Defense against Side-Channel Power Analysis Attacks on Microelectronic Systems\",\"authors\":\"V. Sundaresan, S. Rammohan, R. Vemuri\",\"doi\":\"10.1109/NAECON.2008.4806536\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Side-channel power analysis attacks have become a potent threat to the security of embedded cryptographic devices in microelectronic systems. In this paper, we present an overview of the various side-channel power analysis attacks and defenses (countermeasures) against side-channel power analysis attacks. We introduce these countermeasures and present analyses based on security strength, ease of integration with EDA flows, and hardware characteristics like area, performance and power consumption. This paper is intended as a stepping stone towards developing more practical security-centric design methods that can be efficiently integrated with existing commercially viable designs and EDA flows, resulting in secure as well as hardware optimal implementations of side-channel power analysis attack resistant cryptographic devices.\",\"PeriodicalId\":254758,\"journal\":{\"name\":\"2008 IEEE National Aerospace and Electronics Conference\",\"volume\":\"600 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE National Aerospace and Electronics Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NAECON.2008.4806536\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE National Aerospace and Electronics Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.2008.4806536","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Defense against Side-Channel Power Analysis Attacks on Microelectronic Systems
Side-channel power analysis attacks have become a potent threat to the security of embedded cryptographic devices in microelectronic systems. In this paper, we present an overview of the various side-channel power analysis attacks and defenses (countermeasures) against side-channel power analysis attacks. We introduce these countermeasures and present analyses based on security strength, ease of integration with EDA flows, and hardware characteristics like area, performance and power consumption. This paper is intended as a stepping stone towards developing more practical security-centric design methods that can be efficiently integrated with existing commercially viable designs and EDA flows, resulting in secure as well as hardware optimal implementations of side-channel power analysis attack resistant cryptographic devices.