USB4和TBT3协议的信号完整性挑战和解决方案

Aruna Bathini, Manjunath Jayasimha, Deepak Nagaraj
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引用次数: 1

摘要

I/O信号完整性分析是高速设计的重要组成部分。封装、电路板和无源元件上复杂的布线会降低信号质量。使用高度相关的IBIS AMI模型(包括S参数模型)进行端到端仿真是验证链路仿真的必要条件。USB4和TBT3是下一代USB数据规范,增加了接口的带宽,并允许其他协议共享物理接口。每一代数据速率翻倍(5Gbps - 10Gbps - 20Gbps)也使奈奎斯特频率翻倍,使频率相关的插入损失更严重。此外,在更高频率下增加的电容耦合会给信号增加更多的干扰或噪声,使串扰比在USB3.0/1/2通道中更糟糕。本文提出了满足I/O电气遵从性要求所面临的挑战和平台的解决方案,并讨论了用该系统生成20Gbps PHY的IBIS-AMI(算法建模接口)模型。
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Signal Integrity Challenges and Solutions for USB4 and TBT3 Protocols
Signal Integrity analysis for an I/O forms an integral part of high-speed design. Complex routing on the package, board and passive components degrade the signal quality. End to End simulation using highly corelated IBIS AMI models including S parameter models are the need for the day for validating the link simulation. USB4 & TBT3 are the next-generation USB data specification that increases the bandwidth of the interface and allows other protocols to share the physical interface. Doubling the data rate for every generation 5Gbps - 10Gbps – 20Gbps also doubles the Nyquist frequency making frequency dependent insertion losses worse. In addition, increased capacitive coupling at higher frequencies adds more interference or noise to the signal, making the crosstalk worse than it was in USB3.0/1/2 channels. This paper provides the challenges & solutions for on-die & platform to meet the electrical compliance requirements of I/O and talks on generating IBIS-AMI (Algorithmic Modeling Interface) models for 20Gbps PHY with the system.
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