{"title":"全摆幅逻辑电路的互补BiCMOS技术","authors":"H.J. Shin","doi":"10.1109/VLSIC.1990.111109","DOIUrl":null,"url":null,"abstract":"It has been demonstrated that full-swing complementary MOS/bipolar logic (FS-CMBL) circuits utilizing a push-pull emitter-follower driver and base-emitter shunting to achieve full swing are potentially advantageous for scaled BiCMOS technologies. In these circuits, delay and power consumption depend on characteristics of the base-to-base clamping diode, parasitic capacitances at the two base nodes, and techniques used to achieve full swing. Variations of full-swing complementary circuits utilizing different clamping diodes and full-swing techniques, implemented in a full-complementary BiCMOS technology, are presented. The FS-CMBL circuits demonstrate a clear advantage over the conventional npn-only, partial-swing BiCMOS circuit","PeriodicalId":239990,"journal":{"name":"Digest of Technical Papers., 1990 Symposium on VLSI Circuits","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"Full-swing logic circuits in a complementary BiCMOS technology\",\"authors\":\"H.J. Shin\",\"doi\":\"10.1109/VLSIC.1990.111109\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"It has been demonstrated that full-swing complementary MOS/bipolar logic (FS-CMBL) circuits utilizing a push-pull emitter-follower driver and base-emitter shunting to achieve full swing are potentially advantageous for scaled BiCMOS technologies. In these circuits, delay and power consumption depend on characteristics of the base-to-base clamping diode, parasitic capacitances at the two base nodes, and techniques used to achieve full swing. Variations of full-swing complementary circuits utilizing different clamping diodes and full-swing techniques, implemented in a full-complementary BiCMOS technology, are presented. The FS-CMBL circuits demonstrate a clear advantage over the conventional npn-only, partial-swing BiCMOS circuit\",\"PeriodicalId\":239990,\"journal\":{\"name\":\"Digest of Technical Papers., 1990 Symposium on VLSI Circuits\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-06-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Technical Papers., 1990 Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.1990.111109\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers., 1990 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1990.111109","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Full-swing logic circuits in a complementary BiCMOS technology
It has been demonstrated that full-swing complementary MOS/bipolar logic (FS-CMBL) circuits utilizing a push-pull emitter-follower driver and base-emitter shunting to achieve full swing are potentially advantageous for scaled BiCMOS technologies. In these circuits, delay and power consumption depend on characteristics of the base-to-base clamping diode, parasitic capacitances at the two base nodes, and techniques used to achieve full swing. Variations of full-swing complementary circuits utilizing different clamping diodes and full-swing techniques, implemented in a full-complementary BiCMOS technology, are presented. The FS-CMBL circuits demonstrate a clear advantage over the conventional npn-only, partial-swing BiCMOS circuit