A. Strojwas, Zhengrong Zhu, D. Ciplickas, Xiaolei Li
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Layout manufacturability analysis using rigorous 3-d topography simulation
This paper presents the latest development of Metropole-3D, a three-dimensional vector simulator that is designed to rigorously simulate the photolithography process in VLSI manufacturing. The development work includes implementation of an efficient and stable solution of Maxwell's equation, a rigorous model for post-exposure bake (PEB) and a fast marching module which simulates the development of photoresist. The integration of these features into a rigorous overall simulation approach enables Metropole-3D to meet the demands of simulating DUV and even more advanced lithography process. Simulation of Focus-Exposure Matrix (FEM) conditions shows good matching to experiments in both dense and isolated lines. Process variation analysis using Metropole-3D is demonstrated in a study of undercut and other effects as function of defocus, dose, or other parameters. Finally, line end printability analysis is shown, as an example use of Metropole-3D to study manufacturability of advanced optical proximity correction (OPC).