一种22nm FD-SOI型面积高效48 - 62 GHz堆叠功率放大器

Mengqi Cui, Z. Tibenszky, D. Fritsche, C. Carta, F. Ellinger
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引用次数: 5

摘要

本文提出了一种采用22nm FD-SOI技术实现的毫米波功率放大器(PA),其晶体管电压仅为0.8V。工作在55GHz和62GHz之间的单级伪差分3级堆叠PA对输出功率和面积消耗进行了优化。输入和输出匹配网络利用变压器平衡来最小化损耗和尺寸。在55GHz时测量到15dBm的输出功率和11.8%的功率附加效率(PAE)。该PA在没有衬垫的情况下仅在0.055mm2的面积内制造。与CMOS技术中最先进的毫米波PAs相比,该设计具有每个晶体管最低的电源电压,并且仍然是第二高的输出功率。
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An Area Efficient 48 - 62 GHz Stacked Power Amplifier in 22nm FD-SOI
This paper presents a millimeter wave power amplifier (PA) implemented in 22nm FD-SOI technology with only 0.8V transistors. The single stage pseudo-differential 3-level stacked PA operating between 55GHz and 62GHz is optimized for output power and area consumption. The input and output matching networks utilize transformer baluns to minimize loss and size. An output power of 15dBm and a power added efficiency (PAE) of 11.8 % at 55GHz are measured. The PA is fabricated in an area of only 0.055mm2 without pads. Compared against the state of the art millimeter-wave PAs in CMOS technologies, the presented design has the lowest supply voltage per transistor and still the second highest output power over area value.
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