Fabrication of Silicon photonic circuits with integrated thermo-optic heaters for education

Silicon photonics is revolutionizing computing, communication and sensing systems. As a result, there is a growing need to teach integrated photonic design, fabrication, testing and packaging principles. The focus of this paper is on an improved fabrication process for silicon waveguides that are compatible with most university cleanrooms (i-line photolithography) Furthermore, we establish a simple process for integrating metal heaters to realize thermo-optic tuning of silicon photonic circuits. The process optimization was performed by running extensive etch tests with PEVCD TEOS and carbon hard masks. PECVD TEOS was prone to erosion, while carbon proved more resilient and was chosen as the best hard mask material. The Photolithography was improved by adjusting the coating thickness of the BARC and resist layer. Etch resistance of the photoresist was improved by a simple curing process. The passive component fabrication is followed by addition of metal heater to thermally tune the waveguides. This optimized fabrication process is executed in a CMOS compatible academic fabrication facility with 365 nm i-line lithography. The bi-layer metal lift off process has Nichrome alloy as the heater metal because of this high electrical resistivity along with less resistive molybdenum for contacts.