A.V. Gelatos, B. Nguyen, K. Perry, R. Marsh, J. Peschke, S. Filipiak, E. Travis, N. Bhat, L. La, M. Thompson, T. Saaranen, P. Tobin
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Copper integration into 0.5 /spl mu/m BiCMOS technology
The report describes the integration of copper into the backend of a two-level metal 0.5 /spl mu/m BiCMOS SRAM circuit. The circuit is used to evaluate the impact of copper on the device characteristics. The results of time dependent gate dielectric breakdown, gate oxide interface state generation, temperature dependent reverse diode leakage, and hot carrier injection are used to demonstrate that, under standard backend processing conditions, copper does not degrade device performance.
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