{"title":"基于0.18μm SOI的相位相干7位数字阶跃衰减器","authors":"Arash Ebrahimi Jarihani, F. Koçer","doi":"10.23919/EUMIC.2017.8230686","DOIUrl":null,"url":null,"abstract":"We present a novel digital step attenuator (DSA) with low phase variation under attenuation state and frequency changes. This is achieved while keeping all other specifications comparable with the state-of-the-art. To compensate the phase shift, a number of switchable phase compensating blocks are employed. Unlike previous studies, this work achieves very low phase variation in a commercial, 4×4 quad-flat no-leads (QFN) package, where wirebond effects are significant. The proposed attenuator has 7-bit control with 0 to 31.75 dB attenuation range with 0.25 dB step sizes and achieves accurate attenuation settings in a wide frequency range. The attenuator is fabricated in a commercial 0.18 pm RF silicon-on-insulator (SOI) process. The measurement results show that the attenuator has an amplitude error of less than 1 dB, while introducing a maximum of ±3° phase shift up to 2.2 GHz and less than ±6° between 2.2–3.5 GHz. This approach provides at least 2.5-fold improvement in the phase shift when compared to commercial attenuators. The input 1 dB compression point and IIP3 are measured typically higher than 35 dBm and 45 dBm, respectively. Total chip size, including pads, is 1.95mm × 0.95mm.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A phase coherent 7-bit digital step attenuator on 0.18μm SOI\",\"authors\":\"Arash Ebrahimi Jarihani, F. Koçer\",\"doi\":\"10.23919/EUMIC.2017.8230686\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a novel digital step attenuator (DSA) with low phase variation under attenuation state and frequency changes. This is achieved while keeping all other specifications comparable with the state-of-the-art. To compensate the phase shift, a number of switchable phase compensating blocks are employed. Unlike previous studies, this work achieves very low phase variation in a commercial, 4×4 quad-flat no-leads (QFN) package, where wirebond effects are significant. The proposed attenuator has 7-bit control with 0 to 31.75 dB attenuation range with 0.25 dB step sizes and achieves accurate attenuation settings in a wide frequency range. The attenuator is fabricated in a commercial 0.18 pm RF silicon-on-insulator (SOI) process. The measurement results show that the attenuator has an amplitude error of less than 1 dB, while introducing a maximum of ±3° phase shift up to 2.2 GHz and less than ±6° between 2.2–3.5 GHz. This approach provides at least 2.5-fold improvement in the phase shift when compared to commercial attenuators. The input 1 dB compression point and IIP3 are measured typically higher than 35 dBm and 45 dBm, respectively. Total chip size, including pads, is 1.95mm × 0.95mm.\",\"PeriodicalId\":120932,\"journal\":{\"name\":\"2017 12th European Microwave Integrated Circuits Conference (EuMIC)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 12th European Microwave Integrated Circuits Conference (EuMIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/EUMIC.2017.8230686\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EUMIC.2017.8230686","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A phase coherent 7-bit digital step attenuator on 0.18μm SOI
We present a novel digital step attenuator (DSA) with low phase variation under attenuation state and frequency changes. This is achieved while keeping all other specifications comparable with the state-of-the-art. To compensate the phase shift, a number of switchable phase compensating blocks are employed. Unlike previous studies, this work achieves very low phase variation in a commercial, 4×4 quad-flat no-leads (QFN) package, where wirebond effects are significant. The proposed attenuator has 7-bit control with 0 to 31.75 dB attenuation range with 0.25 dB step sizes and achieves accurate attenuation settings in a wide frequency range. The attenuator is fabricated in a commercial 0.18 pm RF silicon-on-insulator (SOI) process. The measurement results show that the attenuator has an amplitude error of less than 1 dB, while introducing a maximum of ±3° phase shift up to 2.2 GHz and less than ±6° between 2.2–3.5 GHz. This approach provides at least 2.5-fold improvement in the phase shift when compared to commercial attenuators. The input 1 dB compression point and IIP3 are measured typically higher than 35 dBm and 45 dBm, respectively. Total chip size, including pads, is 1.95mm × 0.95mm.