紧凑(Wg/Lg=80/85nm) FDSOI 1T-DRAM由Meta Stable Dip编程

2012 13th International Conference on Ultimate Integration on Silicon (ULIS) Pub Date : 2012-03-06 DOI:10.1109/ULIS.2012.6193392

K. Romanjek, F. Andrieu, J. Cluzel, L. Brevard, P. Perreau, C. Tabone, G. Guégan, T. Poiroux

{"title":"紧凑(Wg/Lg=80/85nm) FDSOI 1T-DRAM由Meta Stable Dip编程","authors":"K. Romanjek, F. Andrieu, J. Cluzel, L. Brevard, P. Perreau, C. Tabone, G. Guégan, T. Poiroux","doi":"10.1109/ULIS.2012.6193392","DOIUrl":null,"url":null,"abstract":"We demonstrate one of the most compact 1 Transistor DRAM (1T-DRAM) cell on Ultra-Thin-Body and 25nm thin Buried oxide (UTBB) down to a gate width of Wg=80nm and length of Lg=35nm for embedded DRAM applications. We have optimized the programming voltages and studied the influence of the device geometry (Wg, Lg) on the 1T-DRAM performance. The Meta Stable Dip (MSD) method provides high read current margin values, reaching 224μA/μm. This is the first experimental assessment of the MSD approach on such scaled 1T-DRAMs.","PeriodicalId":350544,"journal":{"name":"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Compact (Wg/Lg=80/85nm) FDSOI 1T-DRAM programmed by Meta Stable Dip\",\"authors\":\"K. Romanjek, F. Andrieu, J. Cluzel, L. Brevard, P. Perreau, C. Tabone, G. Guégan, T. Poiroux\",\"doi\":\"10.1109/ULIS.2012.6193392\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We demonstrate one of the most compact 1 Transistor DRAM (1T-DRAM) cell on Ultra-Thin-Body and 25nm thin Buried oxide (UTBB) down to a gate width of Wg=80nm and length of Lg=35nm for embedded DRAM applications. We have optimized the programming voltages and studied the influence of the device geometry (Wg, Lg) on the 1T-DRAM performance. The Meta Stable Dip (MSD) method provides high read current margin values, reaching 224μA/μm. This is the first experimental assessment of the MSD approach on such scaled 1T-DRAMs.\",\"PeriodicalId\":350544,\"journal\":{\"name\":\"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)\",\"volume\":\"74 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-03-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ULIS.2012.6193392\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 13th International Conference on Ultimate Integration on Silicon (ULIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ULIS.2012.6193392","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

我们展示了一种最紧凑的1晶体管DRAM (1T-DRAM)电池，采用超薄体和25nm薄埋氧化物(UTBB)，栅极宽度为Wg=80nm，长度为Lg=35nm，用于嵌入式DRAM应用。我们优化了编程电压，并研究了器件几何形状(Wg, Lg)对1T-DRAM性能的影响。MSD (Meta Stable Dip)方法具有较高的读电流裕度值，可达224μA/μm。这是MSD方法在这种规模1t dram上的首次实验评估。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Compact (Wg/Lg=80/85nm) FDSOI 1T-DRAM programmed by Meta Stable Dip

We demonstrate one of the most compact 1 Transistor DRAM (1T-DRAM) cell on Ultra-Thin-Body and 25nm thin Buried oxide (UTBB) down to a gate width of Wg=80nm and length of Lg=35nm for embedded DRAM applications. We have optimized the programming voltages and studied the influence of the device geometry (Wg, Lg) on the 1T-DRAM performance. The Meta Stable Dip (MSD) method provides high read current margin values, reaching 224μA/μm. This is the first experimental assessment of the MSD approach on such scaled 1T-DRAMs.

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2012 13th International Conference on Ultimate Integration on Silicon (ULIS)

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