基于0.13 μm CMOS的6位、1.2 gs /s宽带THA ADC

2008 IEEE Asian Solid-State Circuits Conference Pub Date : 2008-12-12 DOI:10.1109/ASSCC.2008.4708807

B. Chen, Szukang Hsien, C. Chiang, K. Juang

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引用次数: 16

摘要

本文提出了一种6位、1.2 gsample /s的闪存ADC，该ADC采用新提出的宽带跟踪保持放大器(THA)，采用TSMC 0.13-mum CMOS技术制造。宽带THA采用前端超级源跟随器(SSF)，其输入电容非常低，仅为0.2 pf，无需任何片上无源电感即可提高模拟带宽。此外，ADC数据带宽的平整度将得到提高。SSF还可以降低THA中电压缓冲器的功耗。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 6-Bit, 1.2-GS/s ADC with wideband THA in 0.13-μm CMOS

This paper presents a 6-bit, 1.2-GSample/s flash ADC with new proposed wideband track-and-hold amplifier (THA) fabricated in TSMC 0.13-mum CMOS technology. The wideband THA employs a front-end super source follower (SSF), which has a very low input capacitance of only 0.2-pf, to boost analog bandwidth without any on-chip passive inductor. Moreover, the flatness of the data bandwidth of ADC will improve. The SSF can also relax the power consumption of the voltage buffer in the THA.

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2008 IEEE Asian Solid-State Circuits Conference

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