Zhewei Jiang, Shihui Yin, Jae-sun Seo, Mingoo Seok
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C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing
This letter presents C3SRAM, an in-memory-computing SRAM macro, which utilizes analog-mixed-signal capacitive-coupling computing to perform XNOR-and-accumulate operations for binary deep neural networks. The 256 × 64 C3SRAM macro asserts all 256 rows simultaneously and equips one ADC per column, realizing fully parallel vector-matrix multiplication in one cycle. C3SRAM demonstrates 672 TOPS/W and 1638 GOPS, and achieves 98.3% accuracy for MNIST and 85.5% for CIFAR-10 dataset. It achieves 3975× smaller energy-delay product than conventional digital processors.
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