S. Pruvost, R. Cuchet, D. Pellissier, I. Telliez, M. Devulder, X. Gagnard, P. Ancey, M. Aid, F. Danneville, G. Dambrine, N. Rolland, S. Lépilliet
{"title":"采用针对毫米波应用优化的BCB硅上技术的40GHz低噪声接收器电路","authors":"S. Pruvost, R. Cuchet, D. Pellissier, I. Telliez, M. Devulder, X. Gagnard, P. Ancey, M. Aid, F. Danneville, G. Dambrine, N. Rolland, S. Lépilliet","doi":"10.1109/RFIC.2007.380850","DOIUrl":null,"url":null,"abstract":"This paper presents a low area, low consumption, 40 GHz low noise amplifier (LNA), a down-converter and an oscillator, from which the performance of a 40 GHz wireless receiver can be estimated. The circuits were realized using a post-processing BCB above-IC technology and 0.13 mum SiGe:C BiCMOS HBT process, and their performance are compared with those obtained on circuits without post-processing. The 40 GHz LNA exhibits a noise figure of 2.2 dB with an associated gain of 17 dB and a DC power consumption of 20 mW. The measured double-sideband noise figure of the mixer is 4.7 dB with an associated conversion gain of 6.5 dB and a DC consumption of 4.8 mW. The 40 GHz oscillator has a phase noise of -107 dBc/Hz at 1 MHz offset from the carrier measured on a 50 Ohms load. The oscillator output power is 0 dBm for a DC consumption of 15 mW. Beyond these never published results in term of noise figure at 40 GHz, this post-processing technology gives the opportunity to determine the intrinsic noise figure value of the active device (HBT).","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"40GHz Low Noise Receiver Circuits using BCB Above-Silicon Technology Optimized for Millimeter-wave Applications\",\"authors\":\"S. Pruvost, R. Cuchet, D. Pellissier, I. Telliez, M. Devulder, X. Gagnard, P. Ancey, M. Aid, F. Danneville, G. Dambrine, N. Rolland, S. Lépilliet\",\"doi\":\"10.1109/RFIC.2007.380850\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low area, low consumption, 40 GHz low noise amplifier (LNA), a down-converter and an oscillator, from which the performance of a 40 GHz wireless receiver can be estimated. The circuits were realized using a post-processing BCB above-IC technology and 0.13 mum SiGe:C BiCMOS HBT process, and their performance are compared with those obtained on circuits without post-processing. The 40 GHz LNA exhibits a noise figure of 2.2 dB with an associated gain of 17 dB and a DC power consumption of 20 mW. The measured double-sideband noise figure of the mixer is 4.7 dB with an associated conversion gain of 6.5 dB and a DC consumption of 4.8 mW. The 40 GHz oscillator has a phase noise of -107 dBc/Hz at 1 MHz offset from the carrier measured on a 50 Ohms load. The oscillator output power is 0 dBm for a DC consumption of 15 mW. Beyond these never published results in term of noise figure at 40 GHz, this post-processing technology gives the opportunity to determine the intrinsic noise figure value of the active device (HBT).\",\"PeriodicalId\":356468,\"journal\":{\"name\":\"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2007.380850\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2007.380850","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
40GHz Low Noise Receiver Circuits using BCB Above-Silicon Technology Optimized for Millimeter-wave Applications
This paper presents a low area, low consumption, 40 GHz low noise amplifier (LNA), a down-converter and an oscillator, from which the performance of a 40 GHz wireless receiver can be estimated. The circuits were realized using a post-processing BCB above-IC technology and 0.13 mum SiGe:C BiCMOS HBT process, and their performance are compared with those obtained on circuits without post-processing. The 40 GHz LNA exhibits a noise figure of 2.2 dB with an associated gain of 17 dB and a DC power consumption of 20 mW. The measured double-sideband noise figure of the mixer is 4.7 dB with an associated conversion gain of 6.5 dB and a DC consumption of 4.8 mW. The 40 GHz oscillator has a phase noise of -107 dBc/Hz at 1 MHz offset from the carrier measured on a 50 Ohms load. The oscillator output power is 0 dBm for a DC consumption of 15 mW. Beyond these never published results in term of noise figure at 40 GHz, this post-processing technology gives the opportunity to determine the intrinsic noise figure value of the active device (HBT).