{"title":"减少开关数量的新型多电平逆变器性能分析","authors":"Renukaprasad .G, V. S. Kirthika Devi","doi":"10.52783/pst.236","DOIUrl":null,"url":null,"abstract":"Multilevel inverters (MLI) are important and widely accepted under DC to AC converter family for medium and low power applications. In the paper a “new inverter topology” for multi-level is developed. The primary purpose of the work is to reduce the switch count number for considerable level of output voltage and also to reduce gate drives required. It also aims at analysis of performance of proposed topology of new multilevel inverter. Output of fifteen stages is generated from the proposed topology. For which only eight switching devices, four diode and three asymmetrical sources are used. Thus, the space and cost for installation is reduced. The designed topology is simulated with normal “pulse width modulation (PWM)” as well as “sinusoidal pulse width modulation (SPWM)”. Both the Simulation results are discussed with respect to “output voltage, current, Total Harmonic Distortion (THD)”. A comparative study is also made between the topology developed with few other latest MLI topologies.","PeriodicalId":20420,"journal":{"name":"电网技术","volume":"73 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance Analysis of a Novel Multilevel Inverter with Reduced Number of Switches\",\"authors\":\"Renukaprasad .G, V. S. Kirthika Devi\",\"doi\":\"10.52783/pst.236\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multilevel inverters (MLI) are important and widely accepted under DC to AC converter family for medium and low power applications. In the paper a “new inverter topology” for multi-level is developed. The primary purpose of the work is to reduce the switch count number for considerable level of output voltage and also to reduce gate drives required. It also aims at analysis of performance of proposed topology of new multilevel inverter. Output of fifteen stages is generated from the proposed topology. For which only eight switching devices, four diode and three asymmetrical sources are used. Thus, the space and cost for installation is reduced. The designed topology is simulated with normal “pulse width modulation (PWM)” as well as “sinusoidal pulse width modulation (SPWM)”. Both the Simulation results are discussed with respect to “output voltage, current, Total Harmonic Distortion (THD)”. A comparative study is also made between the topology developed with few other latest MLI topologies.\",\"PeriodicalId\":20420,\"journal\":{\"name\":\"电网技术\",\"volume\":\"73 1\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-03-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"电网技术\",\"FirstCategoryId\":\"1087\",\"ListUrlMain\":\"https://doi.org/10.52783/pst.236\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"电网技术","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.52783/pst.236","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"Engineering","Score":null,"Total":0}
Performance Analysis of a Novel Multilevel Inverter with Reduced Number of Switches
Multilevel inverters (MLI) are important and widely accepted under DC to AC converter family for medium and low power applications. In the paper a “new inverter topology” for multi-level is developed. The primary purpose of the work is to reduce the switch count number for considerable level of output voltage and also to reduce gate drives required. It also aims at analysis of performance of proposed topology of new multilevel inverter. Output of fifteen stages is generated from the proposed topology. For which only eight switching devices, four diode and three asymmetrical sources are used. Thus, the space and cost for installation is reduced. The designed topology is simulated with normal “pulse width modulation (PWM)” as well as “sinusoidal pulse width modulation (SPWM)”. Both the Simulation results are discussed with respect to “output voltage, current, Total Harmonic Distortion (THD)”. A comparative study is also made between the topology developed with few other latest MLI topologies.
期刊介绍：
"Power System Technology" (monthly) was founded in 1957. It is a comprehensive academic journal in the field of energy and power, supervised and sponsored by the State Grid Corporation of China. It is published by the Power System Technology Magazine Co., Ltd. of the China Electric Power Research Institute. It is publicly distributed at home and abroad and is included in 12 famous domestic and foreign literature databases such as the Engineering Index (EI) and the National Chinese Core Journals.
The purpose of "Power System Technology" is to serve the national innovation-driven development strategy, promote scientific and technological progress in my country's energy and power fields, and promote the application of new technologies and new products. "Power System Technology" has adhered to the publishing characteristics of combining "theoretical innovation with applied practice" for many years, and the scope of manuscript selection covers the fields of power generation, transmission, distribution, and electricity consumption.
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