{"title":"基于单参考比较器的低功耗全差分电平交叉 ADC,用于无线医疗植入式设备","authors":"Behnam Yazdani, Shahin Jafarabadi Ashtiani","doi":"10.1142/s0218126624502414","DOIUrl":null,"url":null,"abstract":"<p>This paper introduces a low-power fully differential fixed window level-crossing analog-to-digital converter (LC-ADC) for wireless medical implantable devices. The LC-ADC could be an excellent candidate for low-power systems due to the reduction of sampling points for bio-potential signals. Different from existing fixed window LC-ADCs, which use a 1-bit DAC or scaler and two reference levels to move the input signal to the comparison window, a simplified scheme is proposed in which the DAC or scaler is removed and a single-reference level is used to create the comparison window. The proposed LC-ADC utilizes a single-reference comparator, which leads to a simplified implementation and significant reduction in power consumption and circuit area. In addition, using a single reference level and removing DAC, leads to a decrease in the complexity of the controlling logic. The proposed LC-ADC is simulated in 0.18<span><math altimg=\"eq-00001.gif\" display=\"inline\" overflow=\"scroll\"><mspace width=\".17em\"></mspace></math></span><span></span><span><math altimg=\"eq-00002.gif\" display=\"inline\" overflow=\"scroll\"><mi>μ</mi></math></span><span></span>m CMOS technology. The simulation results achieve an effective number of bits (ENOB) of up to 6.5 bits with about 59–141 nW power consumption under 0.8<span><math altimg=\"eq-00003.gif\" display=\"inline\" overflow=\"scroll\"><mspace width=\".17em\"></mspace></math></span><span></span>V supply and input signal bandwidth from 5<span><math altimg=\"eq-00004.gif\" display=\"inline\" overflow=\"scroll\"><mspace width=\".17em\"></mspace></math></span><span></span>Hz to 4<span><math altimg=\"eq-00005.gif\" display=\"inline\" overflow=\"scroll\"><mspace width=\".17em\"></mspace></math></span><span></span>kHz.</p>","PeriodicalId":54866,"journal":{"name":"Journal of Circuits Systems and Computers","volume":"1 1","pages":""},"PeriodicalIF":0.9000,"publicationDate":"2024-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Low-Power Fully Differential Level-Crossing ADC Based on Single-Reference Comparator for Wireless Medical Implantable Devices\",\"authors\":\"Behnam Yazdani, Shahin Jafarabadi Ashtiani\",\"doi\":\"10.1142/s0218126624502414\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>This paper introduces a low-power fully differential fixed window level-crossing analog-to-digital converter (LC-ADC) for wireless medical implantable devices. The LC-ADC could be an excellent candidate for low-power systems due to the reduction of sampling points for bio-potential signals. Different from existing fixed window LC-ADCs, which use a 1-bit DAC or scaler and two reference levels to move the input signal to the comparison window, a simplified scheme is proposed in which the DAC or scaler is removed and a single-reference level is used to create the comparison window. The proposed LC-ADC utilizes a single-reference comparator, which leads to a simplified implementation and significant reduction in power consumption and circuit area. In addition, using a single reference level and removing DAC, leads to a decrease in the complexity of the controlling logic. The proposed LC-ADC is simulated in 0.18<span><math altimg=\\\"eq-00001.gif\\\" display=\\\"inline\\\" overflow=\\\"scroll\\\"><mspace width=\\\".17em\\\"></mspace></math></span><span></span><span><math altimg=\\\"eq-00002.gif\\\" display=\\\"inline\\\" overflow=\\\"scroll\\\"><mi>μ</mi></math></span><span></span>m CMOS technology. The simulation results achieve an effective number of bits (ENOB) of up to 6.5 bits with about 59–141 nW power consumption under 0.8<span><math altimg=\\\"eq-00003.gif\\\" display=\\\"inline\\\" overflow=\\\"scroll\\\"><mspace width=\\\".17em\\\"></mspace></math></span><span></span>V supply and input signal bandwidth from 5<span><math altimg=\\\"eq-00004.gif\\\" display=\\\"inline\\\" overflow=\\\"scroll\\\"><mspace width=\\\".17em\\\"></mspace></math></span><span></span>Hz to 4<span><math altimg=\\\"eq-00005.gif\\\" display=\\\"inline\\\" overflow=\\\"scroll\\\"><mspace width=\\\".17em\\\"></mspace></math></span><span></span>kHz.</p>\",\"PeriodicalId\":54866,\"journal\":{\"name\":\"Journal of Circuits Systems and Computers\",\"volume\":\"1 1\",\"pages\":\"\"},\"PeriodicalIF\":0.9000,\"publicationDate\":\"2024-03-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Circuits Systems and Computers\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1142/s0218126624502414\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Circuits Systems and Computers","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1142/s0218126624502414","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
A Low-Power Fully Differential Level-Crossing ADC Based on Single-Reference Comparator for Wireless Medical Implantable Devices
This paper introduces a low-power fully differential fixed window level-crossing analog-to-digital converter (LC-ADC) for wireless medical implantable devices. The LC-ADC could be an excellent candidate for low-power systems due to the reduction of sampling points for bio-potential signals. Different from existing fixed window LC-ADCs, which use a 1-bit DAC or scaler and two reference levels to move the input signal to the comparison window, a simplified scheme is proposed in which the DAC or scaler is removed and a single-reference level is used to create the comparison window. The proposed LC-ADC utilizes a single-reference comparator, which leads to a simplified implementation and significant reduction in power consumption and circuit area. In addition, using a single reference level and removing DAC, leads to a decrease in the complexity of the controlling logic. The proposed LC-ADC is simulated in 0.18m CMOS technology. The simulation results achieve an effective number of bits (ENOB) of up to 6.5 bits with about 59–141 nW power consumption under 0.8V supply and input signal bandwidth from 5Hz to 4kHz.
期刊介绍:
Journal of Circuits, Systems, and Computers covers a wide scope, ranging from mathematical foundations to practical engineering design in the general areas of circuits, systems, and computers with focus on their circuit aspects. Although primary emphasis will be on research papers, survey, expository and tutorial papers are also welcome. The journal consists of two sections:
Papers - Contributions in this section may be of a research or tutorial nature. Research papers must be original and must not duplicate descriptions or derivations available elsewhere. The author should limit paper length whenever this can be done without impairing quality.
Letters - This section provides a vehicle for speedy publication of new results and information of current interest in circuits, systems, and computers. Focus will be directed to practical design- and applications-oriented contributions, but publication in this section will not be restricted to this material. These letters are to concentrate on reporting the results obtained, their significance and the conclusions, while including only the minimum of supporting details required to understand the contribution. Publication of a manuscript in this manner does not preclude a later publication with a fully developed version.