{"title":"规模 CMOS 器件高κ金属栅极堆栈点缺陷的 Ab Initio 材料建模:变异性与有效功函数工程设计","authors":"Rajan Kumar Pandey","doi":"10.1007/s11664-024-11347-8","DOIUrl":null,"url":null,"abstract":"<p>Silicon (Si) and its oxide (SiO<sub>2</sub>) have been the workhorse of the scaling-driven semiconductor industry. Almost a decade and a half ago, the high-<i>κ</i> metal gate (HKMG) was introduced by Intel for 45-nm technology and by IBM for 32-nm-based complementary metal–oxide–semiconductor (CMOS) technology, wherein hafnium oxide (HfO<sub>2</sub>) and titanium nitride (TiN) were used in the gate stack as the preferred high-<i>κ</i> dielectric and work function metal, respectively. The performance of these scaled CMOS devices at sub-5 nm and beyond relies on accurate control of materials in the bulk and at the interfaces in terms of chemical composition, nature of atomic species, and defects. The defects in gate oxides and at their interfaces influence the threshold voltage shift and mobility degradation. Employing first-principles modeling based on density functional theory, we discuss ways to engineer the effective work function (EWF). We also discuss the variability in the EWF and the reliability issues due to the presence of oxygen point defects in the HKMG stack. We point out the possibilities for EWF engineering through material innovation, point defects, and interface dipole engineering, in order to achieve the required threshold voltage (<i>V</i><sub>T</sub>) of aggressively scaled CMOS devices at sub-5-nm technologies.</p>","PeriodicalId":626,"journal":{"name":"Journal of Electronic Materials","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Ab Initio Materials Modeling of Point Defects in a High-κ Metal Gate Stack of Scaled CMOS Devices: Variability Versus Engineering the Effective Work Function\",\"authors\":\"Rajan Kumar Pandey\",\"doi\":\"10.1007/s11664-024-11347-8\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>Silicon (Si) and its oxide (SiO<sub>2</sub>) have been the workhorse of the scaling-driven semiconductor industry. Almost a decade and a half ago, the high-<i>κ</i> metal gate (HKMG) was introduced by Intel for 45-nm technology and by IBM for 32-nm-based complementary metal–oxide–semiconductor (CMOS) technology, wherein hafnium oxide (HfO<sub>2</sub>) and titanium nitride (TiN) were used in the gate stack as the preferred high-<i>κ</i> dielectric and work function metal, respectively. The performance of these scaled CMOS devices at sub-5 nm and beyond relies on accurate control of materials in the bulk and at the interfaces in terms of chemical composition, nature of atomic species, and defects. The defects in gate oxides and at their interfaces influence the threshold voltage shift and mobility degradation. Employing first-principles modeling based on density functional theory, we discuss ways to engineer the effective work function (EWF). We also discuss the variability in the EWF and the reliability issues due to the presence of oxygen point defects in the HKMG stack. We point out the possibilities for EWF engineering through material innovation, point defects, and interface dipole engineering, in order to achieve the required threshold voltage (<i>V</i><sub>T</sub>) of aggressively scaled CMOS devices at sub-5-nm technologies.</p>\",\"PeriodicalId\":626,\"journal\":{\"name\":\"Journal of Electronic Materials\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Electronic Materials\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1007/s11664-024-11347-8\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Electronic Materials","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1007/s11664-024-11347-8","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Ab Initio Materials Modeling of Point Defects in a High-κ Metal Gate Stack of Scaled CMOS Devices: Variability Versus Engineering the Effective Work Function
Silicon (Si) and its oxide (SiO2) have been the workhorse of the scaling-driven semiconductor industry. Almost a decade and a half ago, the high-κ metal gate (HKMG) was introduced by Intel for 45-nm technology and by IBM for 32-nm-based complementary metal–oxide–semiconductor (CMOS) technology, wherein hafnium oxide (HfO2) and titanium nitride (TiN) were used in the gate stack as the preferred high-κ dielectric and work function metal, respectively. The performance of these scaled CMOS devices at sub-5 nm and beyond relies on accurate control of materials in the bulk and at the interfaces in terms of chemical composition, nature of atomic species, and defects. The defects in gate oxides and at their interfaces influence the threshold voltage shift and mobility degradation. Employing first-principles modeling based on density functional theory, we discuss ways to engineer the effective work function (EWF). We also discuss the variability in the EWF and the reliability issues due to the presence of oxygen point defects in the HKMG stack. We point out the possibilities for EWF engineering through material innovation, point defects, and interface dipole engineering, in order to achieve the required threshold voltage (VT) of aggressively scaled CMOS devices at sub-5-nm technologies.
期刊介绍:
The Journal of Electronic Materials (JEM) reports monthly on the science and technology of electronic materials, while examining new applications for semiconductors, magnetic alloys, dielectrics, nanoscale materials, and photonic materials. The journal welcomes articles on methods for preparing and evaluating the chemical, physical, electronic, and optical properties of these materials. Specific areas of interest are materials for state-of-the-art transistors, nanotechnology, electronic packaging, detectors, emitters, metallization, superconductivity, and energy applications.
Review papers on current topics enable individuals in the field of electronics to keep abreast of activities in areas peripheral to their own. JEM also selects papers from conferences such as the Electronic Materials Conference, the U.S. Workshop on the Physics and Chemistry of II-VI Materials, and the International Conference on Thermoelectrics. It benefits both specialists and non-specialists in the electronic materials field.
A journal of The Minerals, Metals & Materials Society.