2D Memory Enabled by Electrical Stimulation-Induced Defect Engineering for Complicated Neuromorphic Computing

Defect engineering is extensively utilized in 2D memory devices due to its effectiveness in enhancing charge-trapping ability. However, conventional defect modulation techniques usually introduce only single types of carrier traps and cannot reconfigure trap types and densities after device fabrication. Here, for the first time, electrical stimulation-driven long-range migration of Cu ions within CuInP₂S₆ (CIPS) films is demonstrated to simultaneously introduce both electron and hole traps and enable reconfigurable modulation of interfacial defect trapping. This process is referred to as “electrical stimulation-induced defect engineering”. By integrating these defect traps and the dual-gate coupling effect, the memory window-to-scan range (MW/S.R) ratio, which reflects the device's charge trapping ability, doubled and peaked at 78.1% at V_bg = ± 80 V. Additionally, the dual-gate memory device based on the graphene/CIPS/h-BN/WSe₂ heterostructure exhibits a maximum on/off ratio reaching 10⁷ for multi-level storage states, integrating neuromorphic computing and logic operations within a single platform. With 81 storage states and paired-pulse facilitation (PPF), it achieves ≈90% accuracy in reservoir computing (RC) simulations. These results highlight the potential of electrical stimulation-induced defect engineering for next-generation electronics.