{"title":"用于降低emi的DC/DC变换器周期门控制信号的频率选择优化","authors":"Caroline Krause;Stephan Frei","doi":"10.23919/CJEE.2022.000034","DOIUrl":null,"url":null,"abstract":"High-frequency switching of power transistors in power electronic systems can cause electromagnetic emissions. Simple approaches for reducing high-frequency disturbances, such as inserting an additional gate resistor, lead to increased power losses. This makes achieving both electromagnetic compatibility and power efficiency difficult. Active gate drivers help to find a trade-off between these two. Typically, only narrow-band disturbances must be reduced. Accordingly, a target signal with a spectrum notched at some frequencies can be defined. The target signal can be reached by a target-signal-oriented control of the transistor's gate. This leads to steeper switching slopes, such that the power losses are less increased. Generating arbitrary target signals is impossible. The transistor signal exhibits some physical limitations. A constraint satisfaction problem must be solved, and the gate drive signal must be optimized by applying a residual and Newton's method. The proposed optimization process in the frequency domain is based on the circuit simulation method named “harmonic balance”. Measurements on a DC/DC converter exhibit the benefits of this method.","PeriodicalId":36428,"journal":{"name":"Chinese Journal of Electrical Engineering","volume":"8 4","pages":"11-18"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/7873788/10018147/10018157.pdf","citationCount":"1","resultStr":"{\"title\":\"Frequency-selective Optimization of Periodic Gate Control Signals in DC/DC Converters for EMI-reduction\",\"authors\":\"Caroline Krause;Stephan Frei\",\"doi\":\"10.23919/CJEE.2022.000034\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High-frequency switching of power transistors in power electronic systems can cause electromagnetic emissions. Simple approaches for reducing high-frequency disturbances, such as inserting an additional gate resistor, lead to increased power losses. This makes achieving both electromagnetic compatibility and power efficiency difficult. Active gate drivers help to find a trade-off between these two. Typically, only narrow-band disturbances must be reduced. Accordingly, a target signal with a spectrum notched at some frequencies can be defined. The target signal can be reached by a target-signal-oriented control of the transistor's gate. This leads to steeper switching slopes, such that the power losses are less increased. Generating arbitrary target signals is impossible. The transistor signal exhibits some physical limitations. A constraint satisfaction problem must be solved, and the gate drive signal must be optimized by applying a residual and Newton's method. The proposed optimization process in the frequency domain is based on the circuit simulation method named “harmonic balance”. Measurements on a DC/DC converter exhibit the benefits of this method.\",\"PeriodicalId\":36428,\"journal\":{\"name\":\"Chinese Journal of Electrical Engineering\",\"volume\":\"8 4\",\"pages\":\"11-18\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/iel7/7873788/10018147/10018157.pdf\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Chinese Journal of Electrical Engineering\",\"FirstCategoryId\":\"1087\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10018157/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Chinese Journal of Electrical Engineering","FirstCategoryId":"1087","ListUrlMain":"https://ieeexplore.ieee.org/document/10018157/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"Engineering","Score":null,"Total":0}
Frequency-selective Optimization of Periodic Gate Control Signals in DC/DC Converters for EMI-reduction
High-frequency switching of power transistors in power electronic systems can cause electromagnetic emissions. Simple approaches for reducing high-frequency disturbances, such as inserting an additional gate resistor, lead to increased power losses. This makes achieving both electromagnetic compatibility and power efficiency difficult. Active gate drivers help to find a trade-off between these two. Typically, only narrow-band disturbances must be reduced. Accordingly, a target signal with a spectrum notched at some frequencies can be defined. The target signal can be reached by a target-signal-oriented control of the transistor's gate. This leads to steeper switching slopes, such that the power losses are less increased. Generating arbitrary target signals is impossible. The transistor signal exhibits some physical limitations. A constraint satisfaction problem must be solved, and the gate drive signal must be optimized by applying a residual and Newton's method. The proposed optimization process in the frequency domain is based on the circuit simulation method named “harmonic balance”. Measurements on a DC/DC converter exhibit the benefits of this method.