{"title":"基于绝缘金属衬底的SiC JFET电机驱动传导电磁干扰的建模与降低","authors":"X. Gong, J. Ferreira","doi":"10.1109/ECCE.2012.6342762","DOIUrl":null,"url":null,"abstract":"This paper presents the suppression of conducted common mode (CM) Electromagnetic Interference (EMI) in an inverter for motor drive with discrete Silicon Carbide (SiC) JFETs attached on top of the Insulated Metal Substrate (IMS). The EMC performance of the IMS inverter is compared with a heat sink inverter in a similar circuit layout. Both are under the same influence of parasitic couplings between the SiC JFET drains and substrate base plate. It is found that although the application of conventional CM filters effectively suppresses the emitted noise in the low frequency (LF) range, the capacitive coupling influence results in slight or no improvement in the middle frequency (MF) and high frequency (HF) range. To deal with this problem, a system CM equivalent circuit model with extracted parasitic parameters is proposed. The model is able to evaluate the filter insertion losses over a broad conducted EMI frequency band, which is essential to achieve an optimized filter design balanced between performance and cost. The presented experimental and calculated results form the step-by-step guideline that effectively suppresses the generated EMI to comply with the standard prescribed by IEC61800-3 C2: Qp.","PeriodicalId":6401,"journal":{"name":"2012 IEEE Energy Conversion Congress and Exposition (ECCE)","volume":"46 1 1","pages":"629-636"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Modeling and reduction of conducted EMI in SiC JFET motor drives with insulated metal substrate\",\"authors\":\"X. Gong, J. Ferreira\",\"doi\":\"10.1109/ECCE.2012.6342762\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the suppression of conducted common mode (CM) Electromagnetic Interference (EMI) in an inverter for motor drive with discrete Silicon Carbide (SiC) JFETs attached on top of the Insulated Metal Substrate (IMS). The EMC performance of the IMS inverter is compared with a heat sink inverter in a similar circuit layout. Both are under the same influence of parasitic couplings between the SiC JFET drains and substrate base plate. It is found that although the application of conventional CM filters effectively suppresses the emitted noise in the low frequency (LF) range, the capacitive coupling influence results in slight or no improvement in the middle frequency (MF) and high frequency (HF) range. To deal with this problem, a system CM equivalent circuit model with extracted parasitic parameters is proposed. The model is able to evaluate the filter insertion losses over a broad conducted EMI frequency band, which is essential to achieve an optimized filter design balanced between performance and cost. The presented experimental and calculated results form the step-by-step guideline that effectively suppresses the generated EMI to comply with the standard prescribed by IEC61800-3 C2: Qp.\",\"PeriodicalId\":6401,\"journal\":{\"name\":\"2012 IEEE Energy Conversion Congress and Exposition (ECCE)\",\"volume\":\"46 1 1\",\"pages\":\"629-636\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Energy Conversion Congress and Exposition (ECCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCE.2012.6342762\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Energy Conversion Congress and Exposition (ECCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCE.2012.6342762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modeling and reduction of conducted EMI in SiC JFET motor drives with insulated metal substrate
This paper presents the suppression of conducted common mode (CM) Electromagnetic Interference (EMI) in an inverter for motor drive with discrete Silicon Carbide (SiC) JFETs attached on top of the Insulated Metal Substrate (IMS). The EMC performance of the IMS inverter is compared with a heat sink inverter in a similar circuit layout. Both are under the same influence of parasitic couplings between the SiC JFET drains and substrate base plate. It is found that although the application of conventional CM filters effectively suppresses the emitted noise in the low frequency (LF) range, the capacitive coupling influence results in slight or no improvement in the middle frequency (MF) and high frequency (HF) range. To deal with this problem, a system CM equivalent circuit model with extracted parasitic parameters is proposed. The model is able to evaluate the filter insertion losses over a broad conducted EMI frequency band, which is essential to achieve an optimized filter design balanced between performance and cost. The presented experimental and calculated results form the step-by-step guideline that effectively suppresses the generated EMI to comply with the standard prescribed by IEC61800-3 C2: Qp.