采用14nm SOI FinFET技术的4GHz低延迟TCAM，采用高性能电流检测放大器来降低交流电流浪涌

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) Pub Date : 2015-11-02 DOI:10.1109/ESSCIRC.2015.7313897

Alexander Fritsch, Michael Kugel, Rolf Sautter, D. Wendel, J. Pille, O. Torreiter, S. Kalyanasundaram, Daniel Dobson

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引用次数: 6

摘要

14nm SOI FinFET技术的4GHz低延迟TCAM，采用匹配线电流传感方案，在0.9V时能耗为0.63 fJ/bit/搜索，与电压传感实现相比，峰值电流降低50%。按条目可调的搜索深度允许减少可变大小翻译表的功耗。所实现的三明治平面设计实现了高性能0.286μm2 16T-TCAM和0.143μm2 8T-SRAM单元的面积高效集成。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance current sense amplifier for AC current surge reduction

A 4GHz, low latency TCAM in 14nm SOI FinFET technology, using a matchline current sensing scheme with an energy consumption of 0.63 fJ/bit/search at 0.9V and a peak current reduction of 50% compared to voltage sensing implementations. A by entry adjustable search depth allows to reduce power consumption for variable size translation tables. The implemented sandwich floorplan enables an area efficient integration of high performance 0.286μm2 16T-TCAM and 0.143μm2 8T-SRAM cells.

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ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)

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