Amit Jha, A. Ahmadi, S. Kshattry, T. Cao, K. Liao, G. Yeap, Y. Makris, K. O. Kenneth
{"title":"−197dBc/Hz FOM 4.3 ghz VCO采用65nm CMOS中最小尺寸nmos交叉耦合晶体管对的可寻址阵列","authors":"Amit Jha, A. Ahmadi, S. Kshattry, T. Cao, K. Liao, G. Yeap, Y. Makris, K. O. Kenneth","doi":"10.1109/VLSIC.2016.7573540","DOIUrl":null,"url":null,"abstract":"A 4.3-GHz voltage controlled oscillator (VCO) using an addressable array of cross-coupled minimum size NMOS transistor pairs for post fabrication selection is demonstrated in 65-nm CMOS. An algorithm based on Hamming distance using the phase noise measurements of ~1,500 array combinations was used to identify combinations that have record phase noise of -130dBc/Hz at 1-MHz offset from a 4.3-GHz carrier, while consuming 5.2 mW from a 1-V supply. The operating frequency of circuits using post fabrication selection in its high frequency path is increased to 5 GHz.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"35 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"−197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS\",\"authors\":\"Amit Jha, A. Ahmadi, S. Kshattry, T. Cao, K. Liao, G. Yeap, Y. Makris, K. O. Kenneth\",\"doi\":\"10.1109/VLSIC.2016.7573540\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 4.3-GHz voltage controlled oscillator (VCO) using an addressable array of cross-coupled minimum size NMOS transistor pairs for post fabrication selection is demonstrated in 65-nm CMOS. An algorithm based on Hamming distance using the phase noise measurements of ~1,500 array combinations was used to identify combinations that have record phase noise of -130dBc/Hz at 1-MHz offset from a 4.3-GHz carrier, while consuming 5.2 mW from a 1-V supply. The operating frequency of circuits using post fabrication selection in its high frequency path is increased to 5 GHz.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"35 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573540\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573540","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
−197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS
A 4.3-GHz voltage controlled oscillator (VCO) using an addressable array of cross-coupled minimum size NMOS transistor pairs for post fabrication selection is demonstrated in 65-nm CMOS. An algorithm based on Hamming distance using the phase noise measurements of ~1,500 array combinations was used to identify combinations that have record phase noise of -130dBc/Hz at 1-MHz offset from a 4.3-GHz carrier, while consuming 5.2 mW from a 1-V supply. The operating frequency of circuits using post fabrication selection in its high frequency path is increased to 5 GHz.