F. Kuo, S. Ferreira, M. Babaie, H. Chen, Lan-chou Cho, C. Jou, F. Hsueh, Guanzhong Huang, Iman Madadi, Massoud Tohidian, R. Staszewski
{"title":"蓝牙低功耗(BLE)收发器,具有TX/RX可切换片上匹配网络,2.75mW高中频离散时间接收器和3.6mW全数字发射器","authors":"F. Kuo, S. Ferreira, M. Babaie, H. Chen, Lan-chou Cho, C. Jou, F. Hsueh, Guanzhong Huang, Iman Madadi, Massoud Tohidian, R. Staszewski","doi":"10.1109/VLSIC.2016.7573480","DOIUrl":null,"url":null,"abstract":"We present a new ultra-low-power (ULP) transceiver for Internet-of-Things (IoT) optimized for 28-nm CMOS. The receiver (RX) employs a high-rate (up to 10 GS/s) discrete-time (DT) architecture with intermediate frequency (IF) placed beyond the 1/f noise corner of MOS devices. New multistage multi-rate charge-sharing bandpass filters are adapted to achieve high out-of-band linearity, low noise and low power consumption. A transmitter (TX) employs an all-digital PLL (ADPLL) with switched-current-source digitally controlled oscillator (DCO) and switching PA. An integrated on-chip matching network serves both PA and LNTA, thus allowing a 1-pin direct antenna connection with no external antenna filters. The transceiver consumes 2.75mW in RX and 3.6mW in TX when delivering 0 dBm in Bluetooth LE.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"6 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter\",\"authors\":\"F. Kuo, S. Ferreira, M. Babaie, H. Chen, Lan-chou Cho, C. Jou, F. Hsueh, Guanzhong Huang, Iman Madadi, Massoud Tohidian, R. Staszewski\",\"doi\":\"10.1109/VLSIC.2016.7573480\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a new ultra-low-power (ULP) transceiver for Internet-of-Things (IoT) optimized for 28-nm CMOS. The receiver (RX) employs a high-rate (up to 10 GS/s) discrete-time (DT) architecture with intermediate frequency (IF) placed beyond the 1/f noise corner of MOS devices. New multistage multi-rate charge-sharing bandpass filters are adapted to achieve high out-of-band linearity, low noise and low power consumption. A transmitter (TX) employs an all-digital PLL (ADPLL) with switched-current-source digitally controlled oscillator (DCO) and switching PA. An integrated on-chip matching network serves both PA and LNTA, thus allowing a 1-pin direct antenna connection with no external antenna filters. The transceiver consumes 2.75mW in RX and 3.6mW in TX when delivering 0 dBm in Bluetooth LE.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"6 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573480\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573480","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter
We present a new ultra-low-power (ULP) transceiver for Internet-of-Things (IoT) optimized for 28-nm CMOS. The receiver (RX) employs a high-rate (up to 10 GS/s) discrete-time (DT) architecture with intermediate frequency (IF) placed beyond the 1/f noise corner of MOS devices. New multistage multi-rate charge-sharing bandpass filters are adapted to achieve high out-of-band linearity, low noise and low power consumption. A transmitter (TX) employs an all-digital PLL (ADPLL) with switched-current-source digitally controlled oscillator (DCO) and switching PA. An integrated on-chip matching network serves both PA and LNTA, thus allowing a 1-pin direct antenna connection with no external antenna filters. The transceiver consumes 2.75mW in RX and 3.6mW in TX when delivering 0 dBm in Bluetooth LE.