具有横向位线层和垂直栅极的3-D堆叠NAND闪存

2012 IEEE Silicon Nanoelectronics Workshop (SNW) Pub Date : 2012-06-10 DOI:10.1109/SNW.2012.6243354

Ju-Wan Lee, M. Jeong, Byung-Gook Park, Hyungcheol Shin, Jang-Sik Lee

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引用次数: 0

摘要

本文研究了一种新型的3-D堆叠NAND闪存结构，并阐述了该结构器件的制备顺序和关键特性。在ΔVth、保留和循环特性方面表明装置运行合理。此外，采用CDE工艺对多硅BL层进行刻蚀后，消除了其侧表面(通道)的刻蚀损伤，器件性能得到了很大的改善。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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3-D stacked NAND flash memory having lateral bit-line layers and vertical gate

In this paper, we have studied a new 3-D stacked NAND flash memory structure and explained the fabrication sequence and key features of fabricated devices. Reasonable operation of the devices was shown in terms of ΔVth, retention and cycling characteristics. Moreover, the device characteristics were quite improved by removing the etch damage on the side surface (channel) of poly-Si BL layers when CDE process was adopted after etching the BL stack.

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2012 IEEE Silicon Nanoelectronics Workshop (SNW)

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