{"title":"一种基于体交换误差校正的450mV无时距波形分选器","authors":"Seongjong Kim, J. P. Cerqueira, Mingoo Seok","doi":"10.1109/VLSIC.2016.7573561","DOIUrl":null,"url":null,"abstract":"We propose an error detection and correction technique based on local body swapping for eliminating the worst-case margin in near/sub-VTH non-instruction parallel architectures. We apply the proposed technique on an unsupervised waveform sorter for brain computer interface microsystems, improving energy-efficiency by 49.3% and throughput by 35.6% over the baseline that is margined for the worst-case variation. The area overhead is 4.1%.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"198 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"A 450mV timing-margin-free waveform sorter based on body swapping error correction\",\"authors\":\"Seongjong Kim, J. P. Cerqueira, Mingoo Seok\",\"doi\":\"10.1109/VLSIC.2016.7573561\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose an error detection and correction technique based on local body swapping for eliminating the worst-case margin in near/sub-VTH non-instruction parallel architectures. We apply the proposed technique on an unsupervised waveform sorter for brain computer interface microsystems, improving energy-efficiency by 49.3% and throughput by 35.6% over the baseline that is margined for the worst-case variation. The area overhead is 4.1%.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"198 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573561\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573561","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 450mV timing-margin-free waveform sorter based on body swapping error correction
We propose an error detection and correction technique based on local body swapping for eliminating the worst-case margin in near/sub-VTH non-instruction parallel architectures. We apply the proposed technique on an unsupervised waveform sorter for brain computer interface microsystems, improving energy-efficiency by 49.3% and throughput by 35.6% over the baseline that is margined for the worst-case variation. The area overhead is 4.1%.