C. Tang, Mingchen Hou, Xueyang Li, G. Xie, Kuang Sheng
{"title":"采用热氧化和TMAH湿法蚀刻的cmos兼容增强型GaN-on-Si MOS-HEMT具有高击穿电压(930V)","authors":"C. Tang, Mingchen Hou, Xueyang Li, G. Xie, Kuang Sheng","doi":"10.1109/ECCE.2015.7309715","DOIUrl":null,"url":null,"abstract":"In this paper, we report for the first time, an enhancement-mode (E-mode) Al2O3/GaN metal-oxide-semiconductor high-electron-mobility-transistor (MOS-HEMT) using CMOS-compatible techniques including gate region local thermal oxidation and organic alkaline solution (TMAH) wet etching. The fabricated MOS-HEMT exhibits a high positive threshold voltage of +2.5 V, indicating complete pinch-off of the 2 dimensional electron gas (2DEG) channel. Maximum drain current of 250 mA/mm and an off-state breakdown voltage up to 930 V at a 0 V gate bias are observed for the fabricated device of LG = 2.0 μm and LGD = 14 μm, manifesting a low cost, highly repeatable CMOS compatible fabrication method of normally-off GaN-on-Si devices for power electronics applications.","PeriodicalId":6654,"journal":{"name":"2015 IEEE Energy Conversion Congress and Exposition (ECCE)","volume":"30 1","pages":"396-399"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"CMOS-compatible ehancement-mode GaN-on-Si MOS-HEMT with high breakdown voltage (930V) using thermal oxidation and TMAH wet etching\",\"authors\":\"C. Tang, Mingchen Hou, Xueyang Li, G. Xie, Kuang Sheng\",\"doi\":\"10.1109/ECCE.2015.7309715\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we report for the first time, an enhancement-mode (E-mode) Al2O3/GaN metal-oxide-semiconductor high-electron-mobility-transistor (MOS-HEMT) using CMOS-compatible techniques including gate region local thermal oxidation and organic alkaline solution (TMAH) wet etching. The fabricated MOS-HEMT exhibits a high positive threshold voltage of +2.5 V, indicating complete pinch-off of the 2 dimensional electron gas (2DEG) channel. Maximum drain current of 250 mA/mm and an off-state breakdown voltage up to 930 V at a 0 V gate bias are observed for the fabricated device of LG = 2.0 μm and LGD = 14 μm, manifesting a low cost, highly repeatable CMOS compatible fabrication method of normally-off GaN-on-Si devices for power electronics applications.\",\"PeriodicalId\":6654,\"journal\":{\"name\":\"2015 IEEE Energy Conversion Congress and Exposition (ECCE)\",\"volume\":\"30 1\",\"pages\":\"396-399\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Energy Conversion Congress and Exposition (ECCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCE.2015.7309715\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Energy Conversion Congress and Exposition (ECCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCE.2015.7309715","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
CMOS-compatible ehancement-mode GaN-on-Si MOS-HEMT with high breakdown voltage (930V) using thermal oxidation and TMAH wet etching
In this paper, we report for the first time, an enhancement-mode (E-mode) Al2O3/GaN metal-oxide-semiconductor high-electron-mobility-transistor (MOS-HEMT) using CMOS-compatible techniques including gate region local thermal oxidation and organic alkaline solution (TMAH) wet etching. The fabricated MOS-HEMT exhibits a high positive threshold voltage of +2.5 V, indicating complete pinch-off of the 2 dimensional electron gas (2DEG) channel. Maximum drain current of 250 mA/mm and an off-state breakdown voltage up to 930 V at a 0 V gate bias are observed for the fabricated device of LG = 2.0 μm and LGD = 14 μm, manifesting a low cost, highly repeatable CMOS compatible fabrication method of normally-off GaN-on-Si devices for power electronics applications.