{"title":"具有局域捕获电荷的三栅极mosfet阈值电压的二维短沟道模型","authors":"T. Chiang, D. H. Chang","doi":"10.1109/EDSSC.2011.6117566","DOIUrl":null,"url":null,"abstract":"Based on two-dimensional solution of Poisson equation and perimeter-weighted-sum approach, a short-channel threshold voltage model for the tri-gate (TG) MOSFETs with localized trapped charges is developed by considering the effects of equivalent oxide charges on the flat-band voltage. The model shows that threshold voltage behavior is strongly affected by the positive/negative trapped charges, silicon thickness, oxide thickness, and normalized damaged zone affect. The three-dimensional device simulator model verifies the model by the good match with each other. The model can be efficiently used to investigate the hot-carrier-induced threshold voltage degradation of the advanced TG charge-trapped memory device.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":"5 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A two-dimensional short-channel model for threshold voltage of tri-gate (TG) MOSFETs with localized trapped charges\",\"authors\":\"T. Chiang, D. H. Chang\",\"doi\":\"10.1109/EDSSC.2011.6117566\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Based on two-dimensional solution of Poisson equation and perimeter-weighted-sum approach, a short-channel threshold voltage model for the tri-gate (TG) MOSFETs with localized trapped charges is developed by considering the effects of equivalent oxide charges on the flat-band voltage. The model shows that threshold voltage behavior is strongly affected by the positive/negative trapped charges, silicon thickness, oxide thickness, and normalized damaged zone affect. The three-dimensional device simulator model verifies the model by the good match with each other. The model can be efficiently used to investigate the hot-carrier-induced threshold voltage degradation of the advanced TG charge-trapped memory device.\",\"PeriodicalId\":6363,\"journal\":{\"name\":\"2011 IEEE International Conference of Electron Devices and Solid-State Circuits\",\"volume\":\"5 1\",\"pages\":\"1-3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International Conference of Electron Devices and Solid-State Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2011.6117566\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2011.6117566","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A two-dimensional short-channel model for threshold voltage of tri-gate (TG) MOSFETs with localized trapped charges
Based on two-dimensional solution of Poisson equation and perimeter-weighted-sum approach, a short-channel threshold voltage model for the tri-gate (TG) MOSFETs with localized trapped charges is developed by considering the effects of equivalent oxide charges on the flat-band voltage. The model shows that threshold voltage behavior is strongly affected by the positive/negative trapped charges, silicon thickness, oxide thickness, and normalized damaged zone affect. The three-dimensional device simulator model verifies the model by the good match with each other. The model can be efficiently used to investigate the hot-carrier-induced threshold voltage degradation of the advanced TG charge-trapped memory device.
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