Pub Date : 2022-04-01DOI: 10.23919/icep.2017.7939307
{"title":"Copyright page","authors":"","doi":"10.23919/icep.2017.7939307","DOIUrl":"https://doi.org/10.23919/icep.2017.7939307","url":null,"abstract":"","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87159878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-03DOI: 10.1109/ISPSD.2012.6229090
G. Xie, E. Xu, Junmin Lee, N. Hashemi, F. Y. Fu, Bo Zhang, W. Ng
This paper presents a breakdown voltage enhancement technique for power AlGaN/GaN HEMTs by using novel Air-bridge Field Plate (AFP). The device features a metal field plate that jumps from the source over the gate region and lands between gate and drain. Simulation results show that the HEMTs with Air-bridge Field Plate can provide a new degree of freedom to modulate the device surface electric field. In a device with gate to drain distance of 6 µm, gate length of 0.8 µm, two times higher forward blocking voltage of 450 V was obtained at VGS = −5 V when compared to a device with an optimized conventional field plate device (240 V) for a given process.
{"title":"Breakdown voltage enhancement for power AlGaN/GaN HEMTs with Air-bridge Field Plate","authors":"G. Xie, E. Xu, Junmin Lee, N. Hashemi, F. Y. Fu, Bo Zhang, W. Ng","doi":"10.1109/ISPSD.2012.6229090","DOIUrl":"https://doi.org/10.1109/ISPSD.2012.6229090","url":null,"abstract":"This paper presents a breakdown voltage enhancement technique for power AlGaN/GaN HEMTs by using novel Air-bridge Field Plate (AFP). The device features a metal field plate that jumps from the source over the gate region and lands between gate and drain. Simulation results show that the HEMTs with Air-bridge Field Plate can provide a new degree of freedom to modulate the device surface electric field. In a device with gate to drain distance of 6 µm, gate length of 0.8 µm, two times higher forward blocking voltage of 450 V was obtained at VGS = −5 V when compared to a device with an optimized conventional field plate device (240 V) for a given process.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82373128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-29DOI: 10.1109/EDSSC.2011.6117611
Lilan Yu, Wengao Lu, Guannan Wang, Yacong Zhang, Ze Huang, Zhongjian Chen, L. Ji
A drive system for active-matrix OLED panel is presented. The developed system comprises a digital interface which can receive DVI or MCU signals directly, a digital control part, a SRAM for storing display information, common drivers, and the 64-step gray scale segment drivers. Both common driver and segment driver is capable to be cascaded, so it can drive panels in different resolutions by using multiple chips. The drivers are using 0.35um CMOS technology with 15V high voltage devices.
{"title":"An extensible drive system for AM-OLED panel","authors":"Lilan Yu, Wengao Lu, Guannan Wang, Yacong Zhang, Ze Huang, Zhongjian Chen, L. Ji","doi":"10.1109/EDSSC.2011.6117611","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117611","url":null,"abstract":"A drive system for active-matrix OLED panel is presented. The developed system comprises a digital interface which can receive DVI or MCU signals directly, a digital control part, a SRAM for storing display information, common drivers, and the 64-step gray scale segment drivers. Both common driver and segment driver is capable to be cascaded, so it can drive panels in different resolutions by using multiple chips. The drivers are using 0.35um CMOS technology with 15V high voltage devices.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74121838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-29DOI: 10.1109/EDSSC.2011.6117671
Jing Zhu, Qinsong Qian, Weifeng Sun, Shengli Lu, Yanzhang Lin
A novel compact isolation structure for high voltage Gate Drive IC is proposed in this paper. As compared with the conventional isolation structure, the proposed structure can achieve the same breakdown capacity with smaller area by adding N-well islands into P-well region which located between LDMOS (Lateral double diffused MOS) and HVJT (high voltage junction termination) region. Moreover, there is no punch through risk in the region between LDMOS and High-side in proposed structure. Finally, a 600V isolation structure is realized with its drift length is only 49µm.
提出了一种用于高压栅极驱动集成电路的新型紧凑隔离结构。与传统的隔离结构相比，该结构通过在位于LDMOS (Lateral double spreading MOS)和HVJT (high voltage junction termination)之间的P-well区域中加入N-well岛，可以在更小的面积下获得相同的击穿能力。此外，所提出的结构在LDMOS与High-side之间不存在穿孔风险。最后实现了600V的隔离结构，其漂移长度仅为49µm。
{"title":"A novel compact isolated structure for 600V Gate Drive IC","authors":"Jing Zhu, Qinsong Qian, Weifeng Sun, Shengli Lu, Yanzhang Lin","doi":"10.1109/EDSSC.2011.6117671","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117671","url":null,"abstract":"A novel compact isolation structure for high voltage Gate Drive IC is proposed in this paper. As compared with the conventional isolation structure, the proposed structure can achieve the same breakdown capacity with smaller area by adding N-well islands into P-well region which located between LDMOS (Lateral double diffused MOS) and HVJT (high voltage junction termination) region. Moreover, there is no punch through risk in the region between LDMOS and High-side in proposed structure. Finally, a 600V isolation structure is realized with its drift length is only 49µm.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72755532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-29DOI: 10.1109/EDSSC.2011.6117664
L. Xuemei, Wang Zhigong, Wang Keping
This paper describes a frequency synthesizer for DRM/DAB/AM/FM application using 0.18µm CMOS process. The frequency synthesizer operates in the multi-band, including DRM, DAB, AM, and FM. To cover the overall frequencies of them, a novel frequency planning and a new structure are proposed. The monolithic DRM/DAB frequency synthesizer chip is also fabricated in a SMIC's 0.18 µm CMOS process. The die area is 1425 µm×795 µm (include test buffer and pads). The measured results show that phase noise in PLL loop is •59.52dBc/Hz at 10 kHz offset, the measured phase errors of LO quadrature signals is less than 3°. The proposal frequency synthesizer consume 47 mW (include test buffer) under a 1.8 V supply.
{"title":"A design of the frequency synthesizer for DRM/DAB/AM/FM application in 0.18 µm RF CMOS process","authors":"L. Xuemei, Wang Zhigong, Wang Keping","doi":"10.1109/EDSSC.2011.6117664","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117664","url":null,"abstract":"This paper describes a frequency synthesizer for DRM/DAB/AM/FM application using 0.18µm CMOS process. The frequency synthesizer operates in the multi-band, including DRM, DAB, AM, and FM. To cover the overall frequencies of them, a novel frequency planning and a new structure are proposed. The monolithic DRM/DAB frequency synthesizer chip is also fabricated in a SMIC's 0.18 µm CMOS process. The die area is 1425 µm×795 µm (include test buffer and pads). The measured results show that phase noise in PLL loop is •59.52dBc/Hz at 10 kHz offset, the measured phase errors of LO quadrature signals is less than 3°. The proposal frequency synthesizer consume 47 mW (include test buffer) under a 1.8 V supply.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72951861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-29DOI: 10.1109/EDSSC.2011.6117620
Chang-Ju Lee, Gyo-hun Koo, Dong‐Seok Kim, J. Yun, Jung-Hee Lee, S. Hahm
We examined the AlGaN buffer layer dependent photo-response characteristics of the metal-semiconductor-metal (MSM) UV photodetectors (PDs). In the AlGaN buffer layer PD sample, the peak photo-current was of 4.5 µA at 5 V for 365 nm and dark current level ws 4 pA at 1 V. The UV/visible rejection ratio of AlGaN buffer sample was higher than 104 and HT-GaN/LT-AlN sample was 102 at 1 V, respectively. We observed a UV-A selective (or band-pass-like) response behavior near the 360∼370 nm range.
{"title":"UV-A selective photo-responsivity in a GaN MSM photodetector using ITO schottky electrodes","authors":"Chang-Ju Lee, Gyo-hun Koo, Dong‐Seok Kim, J. Yun, Jung-Hee Lee, S. Hahm","doi":"10.1109/EDSSC.2011.6117620","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117620","url":null,"abstract":"We examined the AlGaN buffer layer dependent photo-response characteristics of the metal-semiconductor-metal (MSM) UV photodetectors (PDs). In the AlGaN buffer layer PD sample, the peak photo-current was of 4.5 µA at 5 V for 365 nm and dark current level ws 4 pA at 1 V. The UV/visible rejection ratio of AlGaN buffer sample was higher than 104 and HT-GaN/LT-AlN sample was 102 at 1 V, respectively. We observed a UV-A selective (or band-pass-like) response behavior near the 360∼370 nm range.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80486957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-29DOI: 10.1109/EDSSC.2011.6117689
Shouming Wei, Qinsong Qian, Weifeng Sun, Jing Zhu, Siyang Liu
The Electrostatic discharge (ESD) capabilities of the gate-ground NMOS devices in the circuits with and without input capacitance are experimentally compared in this paper. The experimental results show that the input capacitor can reduce the ESD robustness, which has been explained in detail by using two-dimensional simulator. At last, a novel design is also proposed to improve the ESD protection behavior of the CMOS integrated circuits with the input capacitor. The proposed design is validated by using two-dimensional simulations and experimental analysis.
{"title":"The influence of the input capacitor on the ESD behavior","authors":"Shouming Wei, Qinsong Qian, Weifeng Sun, Jing Zhu, Siyang Liu","doi":"10.1109/EDSSC.2011.6117689","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117689","url":null,"abstract":"The Electrostatic discharge (ESD) capabilities of the gate-ground NMOS devices in the circuits with and without input capacitance are experimentally compared in this paper. The experimental results show that the input capacitor can reduce the ESD robustness, which has been explained in detail by using two-dimensional simulator. At last, a novel design is also proposed to improve the ESD protection behavior of the CMOS integrated circuits with the input capacitor. The proposed design is validated by using two-dimensional simulations and experimental analysis.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84440501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-29DOI: 10.1109/EDSSC.2011.6117736
Meizhen Sang, Jiangtao Xu, S. Yao
An algorithm based on synthesis of two frame images is proposed to expand the dynamic range of CMOS image sensors. By changing the exposure time, a long-exposure and a short-exposure frame are captured and digitally integrated into one high dynamic range (HDR) image with the method of weighting summation. The exposure time can be adjusted according to the scene. The weighting factors are self-adapting to prevent pixel saturation and eliminate image flicker. Using long exposure time 24ms and short exposure time 3ms, the dynamic range is increased by 18dB, peak signal noise ratio (PSNR) can reach to 19.1850, and signal to noise ratio (SNR) is 14.6527. Results show that the dynamic range gain is between 13dB and 32dB without SNR and PSNR reduced.
{"title":"Design based on two-frame composition for high dynamic range CMOS image sensor","authors":"Meizhen Sang, Jiangtao Xu, S. Yao","doi":"10.1109/EDSSC.2011.6117736","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117736","url":null,"abstract":"An algorithm based on synthesis of two frame images is proposed to expand the dynamic range of CMOS image sensors. By changing the exposure time, a long-exposure and a short-exposure frame are captured and digitally integrated into one high dynamic range (HDR) image with the method of weighting summation. The exposure time can be adjusted according to the scene. The weighting factors are self-adapting to prevent pixel saturation and eliminate image flicker. Using long exposure time 24ms and short exposure time 3ms, the dynamic range is increased by 18dB, peak signal noise ratio (PSNR) can reach to 19.1850, and signal to noise ratio (SNR) is 14.6527. Results show that the dynamic range gain is between 13dB and 32dB without SNR and PSNR reduced.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76896662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-12-29DOI: 10.1109/EDSSC.2011.6117690
Xiaopeng Yu, Zhenghao Lu, W. M. Lim, K. Yeo, Yang Liu, X. Yan, Changhui Hu
In this paper, a low power high data rate OOK receiver at GHz range is proposed. An injected locked ring oscillator based local oscillator is used for data demodulation. Implemented with a standard 40nm CMOS process, the receiver is able to recover an input signal with 1–4 GHz carrier frequency at the data rate of 50 Mbps while consuming less than 300 µW.
{"title":"Low power high data rate GHz range receiver in 40nm CMOS technology","authors":"Xiaopeng Yu, Zhenghao Lu, W. M. Lim, K. Yeo, Yang Liu, X. Yan, Changhui Hu","doi":"10.1109/EDSSC.2011.6117690","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117690","url":null,"abstract":"In this paper, a low power high data rate OOK receiver at GHz range is proposed. An injected locked ring oscillator based local oscillator is used for data demodulation. Implemented with a standard 40nm CMOS process, the receiver is able to recover an input signal with 1–4 GHz carrier frequency at the data rate of 50 Mbps while consuming less than 300 µW.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81220912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A new technique is presented for tracking the maximum power point (MPP) of PV arrays, whose hardware is highly simple with all analog circuits, less sensors and no analog multipliers. A dynamically self-adaptive modulation for Iref is proposed to eliminate inflexibility over characteristics variations of PV arrays, where only converter's output current is sensed for control purpose. The boost converter is regulated in peak-current-programmed DCM conditions by three-loop PWM control, reducing EMI and switching loss. The system is designed with the VIS 0.50µm 5V mixed mode 2P3M process. Results of simulation verify good tracking precision and fast response in both steady and dynamic states, and conversion efficiency is about 86% averagely, and 92% as peak value.
{"title":"Dynamically self-adaptive load current maximization technique for maximum power point tracking in photovoltaic arrays","authors":"Liang Yin, Xiaobo Wu, Chern-Lin Chen, Li-cheng Cheng","doi":"10.1109/EDSSC.2011.6117632","DOIUrl":"https://doi.org/10.1109/EDSSC.2011.6117632","url":null,"abstract":"A new technique is presented for tracking the maximum power point (MPP) of PV arrays, whose hardware is highly simple with all analog circuits, less sensors and no analog multipliers. A dynamically self-adaptive modulation for Iref is proposed to eliminate inflexibility over characteristics variations of PV arrays, where only converter's output current is sensed for control purpose. The boost converter is regulated in peak-current-programmed DCM conditions by three-loop PWM control, reducing EMI and switching loss. The system is designed with the VIS 0.50µm 5V mixed mode 2P3M process. Results of simulation verify good tracking precision and fast response in both steady and dynamic states, and conversion efficiency is about 86% averagely, and 92% as peak value.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78573497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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