盖栅Si/SiGe量子点的制备与表征

2012 IEEE Silicon Nanoelectronics Workshop (SNW) Pub Date : 2012-06-10 DOI:10.1109/SNW.2012.6243291

T. Kodera, Y. Fukuoka, K. Takeda, T. Obata, K. Yoshida, K. Sawano, K. Uchida, Y. Shiraki, S. Tarucha, S. Oda

{"title":"盖栅Si/SiGe量子点的制备与表征","authors":"T. Kodera, Y. Fukuoka, K. Takeda, T. Obata, K. Yoshida, K. Sawano, K. Uchida, Y. Shiraki, S. Tarucha, S. Oda","doi":"10.1109/SNW.2012.6243291","DOIUrl":null,"url":null,"abstract":"We study transport properties of quantum point contacts (QPCs) and quantum dots (QDs) with a global capping gate, fabricated on a Si/SiGe high electron mobility transistor (HEMT) wafer. By biasing the capping gate negatively, we succeed in making QPC operation point of surface Schottky gate negatively smaller and then reducing noise. We also observe Coulomb oscillations using a QD structure by suppressing charging noise with negative capping gate voltage.","PeriodicalId":6402,"journal":{"name":"2012 IEEE Silicon Nanoelectronics Workshop (SNW)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fabrication and characterization of Si/SiGe quantum dots with capping gate\",\"authors\":\"T. Kodera, Y. Fukuoka, K. Takeda, T. Obata, K. Yoshida, K. Sawano, K. Uchida, Y. Shiraki, S. Tarucha, S. Oda\",\"doi\":\"10.1109/SNW.2012.6243291\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We study transport properties of quantum point contacts (QPCs) and quantum dots (QDs) with a global capping gate, fabricated on a Si/SiGe high electron mobility transistor (HEMT) wafer. By biasing the capping gate negatively, we succeed in making QPC operation point of surface Schottky gate negatively smaller and then reducing noise. We also observe Coulomb oscillations using a QD structure by suppressing charging noise with negative capping gate voltage.\",\"PeriodicalId\":6402,\"journal\":{\"name\":\"2012 IEEE Silicon Nanoelectronics Workshop (SNW)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Silicon Nanoelectronics Workshop (SNW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SNW.2012.6243291\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SNW.2012.6243291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

我们研究了在Si/SiGe高电子迁移率晶体管(HEMT)晶圆上制备的具有全局盖栅的量子点接触(qpc)和量子点(QDs)的输运性质。通过负偏置盖栅，使表面肖特基栅的QPC工作点负变小，从而降低噪声。我们还通过负封顶栅极电压抑制充电噪声，观察到了QD结构的库仑振荡。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Fabrication and characterization of Si/SiGe quantum dots with capping gate

We study transport properties of quantum point contacts (QPCs) and quantum dots (QDs) with a global capping gate, fabricated on a Si/SiGe high electron mobility transistor (HEMT) wafer. By biasing the capping gate negatively, we succeed in making QPC operation point of surface Schottky gate negatively smaller and then reducing noise. We also observe Coulomb oscillations using a QD structure by suppressing charging noise with negative capping gate voltage.

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2012 IEEE Silicon Nanoelectronics Workshop (SNW)

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