Changrok Moon, Jongwan Jung, Doowon Kwon, Seok-Ha Lee, J. Roh, Kee-Hyun Paik, Doo-Cheol Park, Hongki Kim, Heegeun Jeongc, J. Sim, Hyunpil Noh, Kangbok Lee, Duckhyung Lee, Kinam Kim
{"title":"1.9/spl倍/1.9/spl μ /m/sup 2/像素5M CMOS图像传感器的特点及特点","authors":"Changrok Moon, Jongwan Jung, Doowon Kwon, Seok-Ha Lee, J. Roh, Kee-Hyun Paik, Doo-Cheol Park, Hongki Kim, Heegeun Jeongc, J. Sim, Hyunpil Noh, Kangbok Lee, Duckhyung Lee, Kinam Kim","doi":"10.1109/IEDM.2005.1609475","DOIUrl":null,"url":null,"abstract":"5 mega CMOS image sensor with 1.9mum-pitch pixels has been implemented with 0.13 mum low power CMOS process. By applying 4-shared pixel architecture, 2.5V operation voltage, and tight design rules for some critical layers in pixels, high fill factor and the corresponding high saturation could be obtained. Image lag was sufficiently suppressed by pulse-boosting of transfer gate voltage and electrical cross-talk was suppressed by use of n-type epitaxial layer. It is shown that several sophisticated processes improve sensitivity, temporal random noise, and dark current. With this technology, full 5-mega density CMOS image sensor chips have been successfully developed","PeriodicalId":13071,"journal":{"name":"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.","volume":"33 1","pages":"4 pp.-798"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"The features and characteristics of 5M CMOS image sensor with 1.9/spl times/1.9/spl mu/m/sup 2/ pixels\",\"authors\":\"Changrok Moon, Jongwan Jung, Doowon Kwon, Seok-Ha Lee, J. Roh, Kee-Hyun Paik, Doo-Cheol Park, Hongki Kim, Heegeun Jeongc, J. Sim, Hyunpil Noh, Kangbok Lee, Duckhyung Lee, Kinam Kim\",\"doi\":\"10.1109/IEDM.2005.1609475\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"5 mega CMOS image sensor with 1.9mum-pitch pixels has been implemented with 0.13 mum low power CMOS process. By applying 4-shared pixel architecture, 2.5V operation voltage, and tight design rules for some critical layers in pixels, high fill factor and the corresponding high saturation could be obtained. Image lag was sufficiently suppressed by pulse-boosting of transfer gate voltage and electrical cross-talk was suppressed by use of n-type epitaxial layer. It is shown that several sophisticated processes improve sensitivity, temporal random noise, and dark current. With this technology, full 5-mega density CMOS image sensor chips have been successfully developed\",\"PeriodicalId\":13071,\"journal\":{\"name\":\"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.\",\"volume\":\"33 1\",\"pages\":\"4 pp.-798\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2005.1609475\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2005.1609475","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The features and characteristics of 5M CMOS image sensor with 1.9/spl times/1.9/spl mu/m/sup 2/ pixels
5 mega CMOS image sensor with 1.9mum-pitch pixels has been implemented with 0.13 mum low power CMOS process. By applying 4-shared pixel architecture, 2.5V operation voltage, and tight design rules for some critical layers in pixels, high fill factor and the corresponding high saturation could be obtained. Image lag was sufficiently suppressed by pulse-boosting of transfer gate voltage and electrical cross-talk was suppressed by use of n-type epitaxial layer. It is shown that several sophisticated processes improve sensitivity, temporal random noise, and dark current. With this technology, full 5-mega density CMOS image sensor chips have been successfully developed
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
