{"title":"一种pi栅超薄体无结多晶硅tft的制备与表征","authors":"Jia-Jiun Wu, Hung-Bin Chen, Ming-Hung Han, Yung-Chun Wu, Chun-Yen Chang","doi":"10.1109/SNW.2012.6243302","DOIUrl":null,"url":null,"abstract":"A novel method of fabricate ultrathin body (UTB) junctionless TFTs (JLTFT) with sub-10nm poly-Si channel has been successfully demonstrated. It is no additional mask for lithography. The cost of fabrication flow can be reduced by a novel method, that demonstrate at this work. UTB JLTFT has low threshold voltage and steep subthreshold slop 160 mV/dec at W/L=0.7um/1um. An ON/OFF current ratio is about 106, and transconductance does not decrease rapidly at a high drain voltage.","PeriodicalId":6402,"journal":{"name":"2012 IEEE Silicon Nanoelectronics Workshop (SNW)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fabrication and characterization of a Pi-gate ultrathin body junctionless poly-Si TFTs\",\"authors\":\"Jia-Jiun Wu, Hung-Bin Chen, Ming-Hung Han, Yung-Chun Wu, Chun-Yen Chang\",\"doi\":\"10.1109/SNW.2012.6243302\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel method of fabricate ultrathin body (UTB) junctionless TFTs (JLTFT) with sub-10nm poly-Si channel has been successfully demonstrated. It is no additional mask for lithography. The cost of fabrication flow can be reduced by a novel method, that demonstrate at this work. UTB JLTFT has low threshold voltage and steep subthreshold slop 160 mV/dec at W/L=0.7um/1um. An ON/OFF current ratio is about 106, and transconductance does not decrease rapidly at a high drain voltage.\",\"PeriodicalId\":6402,\"journal\":{\"name\":\"2012 IEEE Silicon Nanoelectronics Workshop (SNW)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Silicon Nanoelectronics Workshop (SNW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SNW.2012.6243302\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SNW.2012.6243302","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fabrication and characterization of a Pi-gate ultrathin body junctionless poly-Si TFTs
A novel method of fabricate ultrathin body (UTB) junctionless TFTs (JLTFT) with sub-10nm poly-Si channel has been successfully demonstrated. It is no additional mask for lithography. The cost of fabrication flow can be reduced by a novel method, that demonstrate at this work. UTB JLTFT has low threshold voltage and steep subthreshold slop 160 mV/dec at W/L=0.7um/1um. An ON/OFF current ratio is about 106, and transconductance does not decrease rapidly at a high drain voltage.