S. Mathew, Sudhir K. Satpathy, Vikram B. Suresh, M. Anders, Himanshu Kaul, A. Agarwal, S. Hsu, Gregory K. Chen, R. Krishnamurthy, V. De
{"title":"14nm三栅极CMOS中4fJ/bit延迟硬化物理不可克隆电路","authors":"S. Mathew, Sudhir K. Satpathy, Vikram B. Suresh, M. Anders, Himanshu Kaul, A. Agarwal, S. Hsu, Gregory K. Chen, R. Krishnamurthy, V. De","doi":"10.1109/VLSIC.2016.7573554","DOIUrl":null,"url":null,"abstract":"A 1024-bit delay-hardened physically unclonable function (PUF) array is fabricated in 14nm tri-gate CMOS, targeted for on-die secure generation of a full-entropy 128bit key. Differential clock delay injection, selective destabilization of unstable bits and temporal-majority-voting (TMV) based winnowing enable 1.7× higher post-burn-in BER improvement, 50% reduction in dark-bit induced bit-errors and worst-case BER of 1.46%. Spectral analysis of unstable PUF bits show significant 1/f noise impacts below 500MHz. In-situ field aging with write feedback improves bit stability by up to 48%.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"20 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 4fJ/bit delay-hardened physically unclonable function circuit with selective bit destabilization in 14nm tri-gate CMOS\",\"authors\":\"S. Mathew, Sudhir K. Satpathy, Vikram B. Suresh, M. Anders, Himanshu Kaul, A. Agarwal, S. Hsu, Gregory K. Chen, R. Krishnamurthy, V. De\",\"doi\":\"10.1109/VLSIC.2016.7573554\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 1024-bit delay-hardened physically unclonable function (PUF) array is fabricated in 14nm tri-gate CMOS, targeted for on-die secure generation of a full-entropy 128bit key. Differential clock delay injection, selective destabilization of unstable bits and temporal-majority-voting (TMV) based winnowing enable 1.7× higher post-burn-in BER improvement, 50% reduction in dark-bit induced bit-errors and worst-case BER of 1.46%. Spectral analysis of unstable PUF bits show significant 1/f noise impacts below 500MHz. In-situ field aging with write feedback improves bit stability by up to 48%.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"20 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573554\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573554","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 4fJ/bit delay-hardened physically unclonable function circuit with selective bit destabilization in 14nm tri-gate CMOS
A 1024-bit delay-hardened physically unclonable function (PUF) array is fabricated in 14nm tri-gate CMOS, targeted for on-die secure generation of a full-entropy 128bit key. Differential clock delay injection, selective destabilization of unstable bits and temporal-majority-voting (TMV) based winnowing enable 1.7× higher post-burn-in BER improvement, 50% reduction in dark-bit induced bit-errors and worst-case BER of 1.46%. Spectral analysis of unstable PUF bits show significant 1/f noise impacts below 500MHz. In-situ field aging with write feedback improves bit stability by up to 48%.