{"title":"BA-BIST:从IC内到外的电路板测试","authors":"Z. Conroy, A. Crouch","doi":"10.1109/TEST.2013.6651919","DOIUrl":null,"url":null,"abstract":"With shrinking geometries of PCBs, increasing interface speeds and corresponding loss of test point access to diagnose structural test defects, new standard test mechanisms are needed to test chip-to-chip connectivity and functionality at the board level. New requirements for an integrated circuit `BA' (Board-Assist) BIST to structurally test these interfaces will be presented. A standardized BA-BIST template and algorithms for industry leverage are proposed.","PeriodicalId":6379,"journal":{"name":"2013 IEEE International Test Conference (ITC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"BA-BIST: Board test from inside the IC out\",\"authors\":\"Z. Conroy, A. Crouch\",\"doi\":\"10.1109/TEST.2013.6651919\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With shrinking geometries of PCBs, increasing interface speeds and corresponding loss of test point access to diagnose structural test defects, new standard test mechanisms are needed to test chip-to-chip connectivity and functionality at the board level. New requirements for an integrated circuit `BA' (Board-Assist) BIST to structurally test these interfaces will be presented. A standardized BA-BIST template and algorithms for industry leverage are proposed.\",\"PeriodicalId\":6379,\"journal\":{\"name\":\"2013 IEEE International Test Conference (ITC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-11-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Test Conference (ITC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.2013.6651919\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Test Conference (ITC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.2013.6651919","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
With shrinking geometries of PCBs, increasing interface speeds and corresponding loss of test point access to diagnose structural test defects, new standard test mechanisms are needed to test chip-to-chip connectivity and functionality at the board level. New requirements for an integrated circuit `BA' (Board-Assist) BIST to structurally test these interfaces will be presented. A standardized BA-BIST template and algorithms for industry leverage are proposed.