{"title":"具有高抗电源弹跳度的电平转换器，用于高速低于1 v的lsi","authors":"Y. Kanno, H. Mizuno, K. Tanaka, T. Watanabe","doi":"10.1109/VLSIC.2000.852890","DOIUrl":null,"url":null,"abstract":"We have developed a pump-hopping level-up converter and a differential-input, level-down converter that, enable level conversion for I/O interfacing in sub-1-V LSIs. The level-up converter transforms signals of 0.64 V to 3.6 V within 5 ns with a 0.14-/spl mu/m CMOS technology. The differential input level down converter enables stable operation even at VDD of 0.5 V. These proposed level converters also provide the immunity against power-supply bouncing, which is essential for low-voltage and high-speed LSIs.","PeriodicalId":6361,"journal":{"name":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","volume":"10 1","pages":"202-203"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"46","resultStr":"{\"title\":\"Level converters with high immunity to power-supply bouncing for high-speed sub-1-V LSIs\",\"authors\":\"Y. Kanno, H. Mizuno, K. Tanaka, T. Watanabe\",\"doi\":\"10.1109/VLSIC.2000.852890\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have developed a pump-hopping level-up converter and a differential-input, level-down converter that, enable level conversion for I/O interfacing in sub-1-V LSIs. The level-up converter transforms signals of 0.64 V to 3.6 V within 5 ns with a 0.14-/spl mu/m CMOS technology. The differential input level down converter enables stable operation even at VDD of 0.5 V. These proposed level converters also provide the immunity against power-supply bouncing, which is essential for low-voltage and high-speed LSIs.\",\"PeriodicalId\":6361,\"journal\":{\"name\":\"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)\",\"volume\":\"10 1\",\"pages\":\"202-203\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"46\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2000.852890\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2000.852890","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Level converters with high immunity to power-supply bouncing for high-speed sub-1-V LSIs
We have developed a pump-hopping level-up converter and a differential-input, level-down converter that, enable level conversion for I/O interfacing in sub-1-V LSIs. The level-up converter transforms signals of 0.64 V to 3.6 V within 5 ns with a 0.14-/spl mu/m CMOS technology. The differential input level down converter enables stable operation even at VDD of 0.5 V. These proposed level converters also provide the immunity against power-supply bouncing, which is essential for low-voltage and high-speed LSIs.
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