基于混合mosfet -多晶硅纳米线的新型逻辑系列

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest. Pub Date : 2005-12-05 DOI:10.1109/IEDM.2005.1609325

S. Ecoffey, M. Mazza, V. Pott, D. Bouvet, A. Schmid, Y. Leblebici, M.J. Declereq, A. Ionescu

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引用次数: 10

摘要

提出了一种基于超薄膜(10nm)纳米颗粒(5 ~ 20nm)多晶硅线(polySiNW)的新型逻辑家族，并对其进行了验证和研究。该逻辑系列可以在4K到400K范围内工作，并与传统CMOS混合。已经观察到数百pw的超低功耗，在功耗方面优于CMOS技术，数量级

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A new logic family based on hybrid MOSFET-polysilicon nanowires

A new logic family based on ultra-thin film (10nm) nanograins (5 to 20nm) polysilicon wires (polySiNW) is proposed, validated and studied. This logic family can be operated from 4K up to 400K and hybridized with conventional CMOS. Ultra low power dissipation in the order of hundreds of pWs has been observed, which is outperforming CMOS technology, in terms of power consumption, by orders of magnitude

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IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.

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