面向海量媒体数据搜索系统的fpga加速部分图像匹配引擎

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) Pub Date : 2016-06-01 DOI:10.1109/VLSIC.2016.7573489

Takashi Shimizu, Y. Tomita, Hidetoshi Matsumura, Masahiko Sugimura, Hironobu Yamasaki, David Thach, T. Miyoshi, Takayuki Baba, Yasuhiro Watanabe, A. Ike

{"title":"面向海量媒体数据搜索系统的fpga加速部分图像匹配引擎","authors":"Takashi Shimizu, Y. Tomita, Hidetoshi Matsumura, Masahiko Sugimura, Hironobu Yamasaki, David Thach, T. Miyoshi, Takayuki Baba, Yasuhiro Watanabe, A. Ike","doi":"10.1109/VLSIC.2016.7573489","DOIUrl":null,"url":null,"abstract":"We propose and demonstrate an FPGA-accelerated partial-image-matching engine for massive media-data searching systems. To take advantage of FPGA, a highly parallelized and pipelined architecture with an application-specific calculation was adopted. Our prototype system achieves 32 times better runtime performance than a CPU-based solution.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"1 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An FPGA-accelerated partial image matching engine for massive media data searching systems\",\"authors\":\"Takashi Shimizu, Y. Tomita, Hidetoshi Matsumura, Masahiko Sugimura, Hironobu Yamasaki, David Thach, T. Miyoshi, Takayuki Baba, Yasuhiro Watanabe, A. Ike\",\"doi\":\"10.1109/VLSIC.2016.7573489\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose and demonstrate an FPGA-accelerated partial-image-matching engine for massive media-data searching systems. To take advantage of FPGA, a highly parallelized and pipelined architecture with an application-specific calculation was adopted. Our prototype system achieves 32 times better runtime performance than a CPU-based solution.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"1 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573489\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573489","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

我们提出并演示了一个fpga加速的部分图像匹配引擎，用于海量媒体数据搜索系统。为了充分利用FPGA的优势，采用了一种高度并行化和流水线化的架构，并针对具体应用进行了计算。我们的原型系统实现了比基于cpu的解决方案好32倍的运行时性能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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An FPGA-accelerated partial image matching engine for massive media data searching systems

We propose and demonstrate an FPGA-accelerated partial-image-matching engine for massive media-data searching systems. To take advantage of FPGA, a highly parallelized and pipelined architecture with an application-specific calculation was adopted. Our prototype system achieves 32 times better runtime performance than a CPU-based solution.

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2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)

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