机械应变下FinFET和GAA NSFET中NBTI退化的TCAD框架

R. Tiwari, N. Parihar, Karansingh Thakor, H. Wong, S. Mahapatra
{"title":"机械应变下FinFET和GAA NSFET中NBTI退化的TCAD框架","authors":"R. Tiwari, N. Parihar, Karansingh Thakor, H. Wong, S. Mahapatra","doi":"10.1109/SISPAD.2019.8870523","DOIUrl":null,"url":null,"abstract":"A physics-based TCAD framework is used to estimate the interface trap generation (ΔNIT) during Negative Bias Temperature Instability (NBTI) stress in P-channel FinFET and Gate All Around (GAA) Nano-Sheet (NS) FET. The impact of mechanical strain due to channel length scaling (LCH) on ΔNIT generation is estimated. The bandstructure calculations are used to explain the impact of mechanical strain on ΔNIT generation.","PeriodicalId":6755,"journal":{"name":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"4 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"TCAD Framework to Estimate the NBTI Degradation in FinFET and GAA NSFET Under Mechanical Strain\",\"authors\":\"R. Tiwari, N. Parihar, Karansingh Thakor, H. Wong, S. Mahapatra\",\"doi\":\"10.1109/SISPAD.2019.8870523\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A physics-based TCAD framework is used to estimate the interface trap generation (ΔNIT) during Negative Bias Temperature Instability (NBTI) stress in P-channel FinFET and Gate All Around (GAA) Nano-Sheet (NS) FET. The impact of mechanical strain due to channel length scaling (LCH) on ΔNIT generation is estimated. The bandstructure calculations are used to explain the impact of mechanical strain on ΔNIT generation.\",\"PeriodicalId\":6755,\"journal\":{\"name\":\"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"volume\":\"4 1\",\"pages\":\"1-4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SISPAD.2019.8870523\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2019.8870523","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

使用基于物理的TCAD框架来估计p沟道FinFET和GAA纳米片FET在负偏置温度不稳定性(NBTI)应力下产生的界面陷阱(ΔNIT)。估计了通道长度缩放(LCH)引起的机械应变对ΔNIT生成的影响。带结构计算用于解释机械应变对ΔNIT生成的影响。
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TCAD Framework to Estimate the NBTI Degradation in FinFET and GAA NSFET Under Mechanical Strain
A physics-based TCAD framework is used to estimate the interface trap generation (ΔNIT) during Negative Bias Temperature Instability (NBTI) stress in P-channel FinFET and Gate All Around (GAA) Nano-Sheet (NS) FET. The impact of mechanical strain due to channel length scaling (LCH) on ΔNIT generation is estimated. The bandstructure calculations are used to explain the impact of mechanical strain on ΔNIT generation.
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