Yuan Du, Wei-Han Cho, Yilei Li, C. Wong, Jieqiong Du, Po-Tsang Huang, Yanghyo Kim, Zuow-Zun Chen, S. Lee, Mau-Chung Frank Chang
{"title":"16Gb/s 14.7mW三频带认知串行链路发送器,时钟转发,支持PAM-16 / 256-QAM和28 nm CMOS通道响应检测","authors":"Yuan Du, Wei-Han Cho, Yilei Li, C. Wong, Jieqiong Du, Po-Tsang Huang, Yanghyo Kim, Zuow-Zun Chen, S. Lee, Mau-Chung Frank Chang","doi":"10.1109/VLSIC.2016.7573523","DOIUrl":null,"url":null,"abstract":"A cognitive tri-band transmitter with forwarded clock using multi-band signaling and high-level digital signal modulations is presented for serial link application. The transmitter features learning an arbitrary channel response by sending a sweep of continuous wave, detecting power level, and accordingly adapts modulation scheme, data bandwidth and carrier frequency. The modulation scheme ranges from NRZ/QPSK to PAM-16/256-QAM. The highly re-configurable transmitter is capable of dealing with low-cost serial link cables/connectors or multi-drop buses with deep and narrow notches in frequency domain (e.g. 40dB loss at notches). The adaptive multi-band scheme mitigates equalization requirement and enhances the energy efficiency by avoiding frequency notches and utilizing the maximum available signal-to-noise ratio and channel bandwidth. The implemented transmitter consumes 14.7mW power and occupies 0.016mm2 in 28nm CMOS. It achieves a maximum data rate of 16Gb/s per differential pair and the most energy-efficient FoM (defined in Fig. 8) of 20.4 μW/Gb/s/dB considering channel condition.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"26 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS\",\"authors\":\"Yuan Du, Wei-Han Cho, Yilei Li, C. Wong, Jieqiong Du, Po-Tsang Huang, Yanghyo Kim, Zuow-Zun Chen, S. Lee, Mau-Chung Frank Chang\",\"doi\":\"10.1109/VLSIC.2016.7573523\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A cognitive tri-band transmitter with forwarded clock using multi-band signaling and high-level digital signal modulations is presented for serial link application. The transmitter features learning an arbitrary channel response by sending a sweep of continuous wave, detecting power level, and accordingly adapts modulation scheme, data bandwidth and carrier frequency. The modulation scheme ranges from NRZ/QPSK to PAM-16/256-QAM. The highly re-configurable transmitter is capable of dealing with low-cost serial link cables/connectors or multi-drop buses with deep and narrow notches in frequency domain (e.g. 40dB loss at notches). The adaptive multi-band scheme mitigates equalization requirement and enhances the energy efficiency by avoiding frequency notches and utilizing the maximum available signal-to-noise ratio and channel bandwidth. The implemented transmitter consumes 14.7mW power and occupies 0.016mm2 in 28nm CMOS. It achieves a maximum data rate of 16Gb/s per differential pair and the most energy-efficient FoM (defined in Fig. 8) of 20.4 μW/Gb/s/dB considering channel condition.\",\"PeriodicalId\":6512,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"volume\":\"26 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2016.7573523\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573523","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS
A cognitive tri-band transmitter with forwarded clock using multi-band signaling and high-level digital signal modulations is presented for serial link application. The transmitter features learning an arbitrary channel response by sending a sweep of continuous wave, detecting power level, and accordingly adapts modulation scheme, data bandwidth and carrier frequency. The modulation scheme ranges from NRZ/QPSK to PAM-16/256-QAM. The highly re-configurable transmitter is capable of dealing with low-cost serial link cables/connectors or multi-drop buses with deep and narrow notches in frequency domain (e.g. 40dB loss at notches). The adaptive multi-band scheme mitigates equalization requirement and enhances the energy efficiency by avoiding frequency notches and utilizing the maximum available signal-to-noise ratio and channel bandwidth. The implemented transmitter consumes 14.7mW power and occupies 0.016mm2 in 28nm CMOS. It achieves a maximum data rate of 16Gb/s per differential pair and the most energy-efficient FoM (defined in Fig. 8) of 20.4 μW/Gb/s/dB considering channel condition.