μRNG:基于14nm FinFET CMOS的300-950mV 323Gbps/W全数字全熵真随机数发生器

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) Pub Date : 2015-11-02 DOI:10.1109/ESSCIRC.2015.7313842

S. Mathew, D. Johnston, P. Newman, Sudhir K. Satpathy, Vikram B. Suresh, M. Anders, Himanshu Kaul, Gregory K. Chen, A. Agarwal, S. Hsu, R. Krishnamurthy

{"title":"μRNG:基于14nm FinFET CMOS的300-950mV 323Gbps/W全数字全熵真随机数发生器","authors":"S. Mathew, D. Johnston, P. Newman, Sudhir K. Satpathy, Vikram B. Suresh, M. Anders, Himanshu Kaul, Gregory K. Chen, A. Agarwal, S. Hsu, R. Krishnamurthy","doi":"10.1109/ESSCIRC.2015.7313842","DOIUrl":null,"url":null,"abstract":"An all-digital full-entropy True Random Number Generator (TRNG) with measured 1.3GHz operation and total power consumption of 1.5mW at 0.75V, 25oC is fabricated in 14nm FinFET CMOS. Three independent self-calibrating entropy sources, coupled with pre-extraction correlation suppressors and a real-time BIW extractor enable ultra-low energy consumption of 3pJ/bit, while generating cryptographic-quality keys with measured Shannon entropy up to 0.99999999995 and lower-bound min-entropy >0.99. The 100% digital design enables a compact layout occupying 1088μm2, with scalable operation down to 300mV, while passing all NIST statistical randomness tests.","PeriodicalId":11845,"journal":{"name":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2015-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"μRNG: A 300–950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS\",\"authors\":\"S. Mathew, D. Johnston, P. Newman, Sudhir K. Satpathy, Vikram B. Suresh, M. Anders, Himanshu Kaul, Gregory K. Chen, A. Agarwal, S. Hsu, R. Krishnamurthy\",\"doi\":\"10.1109/ESSCIRC.2015.7313842\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An all-digital full-entropy True Random Number Generator (TRNG) with measured 1.3GHz operation and total power consumption of 1.5mW at 0.75V, 25oC is fabricated in 14nm FinFET CMOS. Three independent self-calibrating entropy sources, coupled with pre-extraction correlation suppressors and a real-time BIW extractor enable ultra-low energy consumption of 3pJ/bit, while generating cryptographic-quality keys with measured Shannon entropy up to 0.99999999995 and lower-bound min-entropy >0.99. The 100% digital design enables a compact layout occupying 1088μm2, with scalable operation down to 300mV, while passing all NIST statistical randomness tests.\",\"PeriodicalId\":11845,\"journal\":{\"name\":\"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2015.7313842\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2015.7313842","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 11

摘要

采用14nm FinFET CMOS制造了一种全数字全熵真随机数发生器(TRNG)，其工作频率为1.3GHz, 0.75V, 25oC时总功耗为1.5mW。三个独立的自校准熵源，加上预提取相关抑制器和实时BIW提取器，可实现超低能耗3pJ/bit，同时生成的香农熵测量值高达0.99999999995，下限最小熵>0.99的加密质量密钥。100%数字化设计实现了占地1088μm2的紧凑布局，可扩展操作低至300mV，同时通过了所有NIST统计随机性测试。

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μRNG: A 300–950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS

An all-digital full-entropy True Random Number Generator (TRNG) with measured 1.3GHz operation and total power consumption of 1.5mW at 0.75V, 25oC is fabricated in 14nm FinFET CMOS. Three independent self-calibrating entropy sources, coupled with pre-extraction correlation suppressors and a real-time BIW extractor enable ultra-low energy consumption of 3pJ/bit, while generating cryptographic-quality keys with measured Shannon entropy up to 0.99999999995 and lower-bound min-entropy >0.99. The 100% digital design enables a compact layout occupying 1088μm2, with scalable operation down to 300mV, while passing all NIST statistical randomness tests.

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ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC)

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