一种基于浮栅fet的CMOS可编程模拟存储单元阵列

J. A. Bragg, R. Harrison, P. Hasler, S. DeWeerth
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引用次数: 5

摘要

模拟VLSI系统的复杂性通常受到芯片上引脚数量的限制,而不是受到芯片面积的限制。目前,许多模拟参数和偏置都存储在芯片外。在芯片上移动参数存储可以节省引脚,并允许我们创建复杂的可编程模拟系统。在本文中,我们提出了一个片上非易失性模拟存储器单元的设计,它可以配置在可寻址阵列中并且易于编程。我们使用浮栅MOS晶体管来存储电荷,并使用隧道和fet热电子注入过程来编程值。通过这些设计,我们实现了大于13位的输出精度,电源抑制比为39 dB,存储单元之间没有串扰。
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A floating-gate pFET based CMOS programmable analog memory cell array
The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than by the die area. Currently, many analog parameters and biases are stored off chip. Moving parameter storage on chip could save pins and allow us to create complex programmable analog systems. In this paper, we present a design for an on-chip non-volatile analog memory cell that can be configured in addressable arrays and programmed easily. We use floating-gate MOS transistors to store charge, and we use the processes of tunneling and pFET hot-electron injection to program values. With these designs, we achieve greater than 13-bit output precision with a 39 dB power supply rejection ratio and no crosstalk between memory cells.
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