{"title":"60GHz直接转换CMOS收发器设计","authors":"A. Matsuzawa, K. Okada","doi":"10.1109/EDSSC.2011.6117563","DOIUrl":null,"url":null,"abstract":"A 60 GHz direct conversion transceiver was developed using 65 nm CMOS and demonstrates 7 Gbps using 16 QAM. A quadrature VCO attained very low phase noise of •94 dBc/Hz @1 MHz.","PeriodicalId":6363,"journal":{"name":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"60GHz direct conversion CMOS transceiver design\",\"authors\":\"A. Matsuzawa, K. Okada\",\"doi\":\"10.1109/EDSSC.2011.6117563\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 60 GHz direct conversion transceiver was developed using 65 nm CMOS and demonstrates 7 Gbps using 16 QAM. A quadrature VCO attained very low phase noise of •94 dBc/Hz @1 MHz.\",\"PeriodicalId\":6363,\"journal\":{\"name\":\"2011 IEEE International Conference of Electron Devices and Solid-State Circuits\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International Conference of Electron Devices and Solid-State Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2011.6117563\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference of Electron Devices and Solid-State Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2011.6117563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 60 GHz direct conversion transceiver was developed using 65 nm CMOS and demonstrates 7 Gbps using 16 QAM. A quadrature VCO attained very low phase noise of •94 dBc/Hz @1 MHz.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
