{"title":"使用图划分分解逻辑函数","authors":"M. Golumbic, A. Mintz","doi":"10.1109/ICCAD.1999.810648","DOIUrl":null,"url":null,"abstract":"Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical properties and the dependent stage where mapping to a physical cell library is done. The independent stage includes logic operations such as decomposition, extraction, factoring, substitution and elimination. These operations are done with some kind of division (Boolean, algebraic), with the goal being to obtain a logically equivalent factored form which minimizes the number of literals. In this paper, we present an algorithm for factoring that uses graph partitioning rather than division. Central to our approach is to combine this with the use of special classes of Boolean functions, such as read-once functions, to devise new combinatorial algorithms for logic minimization. Our method has been implemented in the SIS environment, and an empirical evaluation indicates that we usually get significantly better results than algebraic factoring and are quite competitive with Boolean factoring but with lower computation costs.","PeriodicalId":6414,"journal":{"name":"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)","volume":"26 1 1","pages":"195-198"},"PeriodicalIF":0.0000,"publicationDate":"1999-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":"{\"title\":\"Factoring logic functions using graph partitioning\",\"authors\":\"M. Golumbic, A. Mintz\",\"doi\":\"10.1109/ICCAD.1999.810648\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical properties and the dependent stage where mapping to a physical cell library is done. The independent stage includes logic operations such as decomposition, extraction, factoring, substitution and elimination. These operations are done with some kind of division (Boolean, algebraic), with the goal being to obtain a logically equivalent factored form which minimizes the number of literals. In this paper, we present an algorithm for factoring that uses graph partitioning rather than division. Central to our approach is to combine this with the use of special classes of Boolean functions, such as read-once functions, to devise new combinatorial algorithms for logic minimization. Our method has been implemented in the SIS environment, and an empirical evaluation indicates that we usually get significantly better results than algebraic factoring and are quite competitive with Boolean factoring but with lower computation costs.\",\"PeriodicalId\":6414,\"journal\":{\"name\":\"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)\",\"volume\":\"26 1 1\",\"pages\":\"195-198\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-11-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"23\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAD.1999.810648\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1999.810648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Factoring logic functions using graph partitioning
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical properties and the dependent stage where mapping to a physical cell library is done. The independent stage includes logic operations such as decomposition, extraction, factoring, substitution and elimination. These operations are done with some kind of division (Boolean, algebraic), with the goal being to obtain a logically equivalent factored form which minimizes the number of literals. In this paper, we present an algorithm for factoring that uses graph partitioning rather than division. Central to our approach is to combine this with the use of special classes of Boolean functions, such as read-once functions, to devise new combinatorial algorithms for logic minimization. Our method has been implemented in the SIS environment, and an empirical evaluation indicates that we usually get significantly better results than algebraic factoring and are quite competitive with Boolean factoring but with lower computation costs.