并联降压变换器的共模和差模回路增益

Ming Li, C. Tse
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引用次数: 0

摘要

基于并联降压变换器小信号模型的时域分解,推导出两个等效的低阶环路增益,即共模和差模环路增益,用于分析和设计N个变换器模块的系统稳定性。具体地说,所提出的环路增益应用于主动电流共享控制下的两个电压模式控制降压变换器。实验验证了所提出的回路增益在定位设计参数稳定边界方面的有效性。
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Common-mode and differential-mode loop gains of paralleled buck converters
Based on the time-domain decomposition of small-signal model in paralleled buck converters, two equivalent low-order loop gains, namely, common-mode and differential-mode loop gains, are derived to analyze and design the stability of the system with N converter modules. Specifically, the proposed loop gains are applied to two voltage-mode controlled buck converters under active current-sharing control. Experimental verification is performed to validate the effectiveness of the proposed loop gains on locating the stability boundary of design parameters.
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