M. K. Dawood, T. H. Ng, P. K. Tan, H. Tan, S. James, P. S. Limin, H. H. Yap, J. Lam, Z. Mai
{"title":"On-chip device and circuit diagnostics on advanced technology nodes by nanoprobing","authors":"M. K. Dawood, T. H. Ng, P. K. Tan, H. Tan, S. James, P. S. Limin, H. H. Yap, J. Lam, Z. Mai","doi":"10.1109/IPFA.2014.6898154","DOIUrl":null,"url":null,"abstract":"It is becoming increasingly challenging for conventional failure analysis methods to identify the failure mechanism at circuit level in an integrated chip. This paper demonstrates the utilization of nanoprobing for on-chip device and circuit debugging for defect localization at circuit level. FIB circuit edit was first performed to isolate the intended circuit. Next nanoprobing was performed on higher metal layer to identify the cause of failure. Nanoprobing was then performed at the contact level to verify the source of failure.","PeriodicalId":409316,"journal":{"name":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":" 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 21th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2014.6898154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
It is becoming increasingly challenging for conventional failure analysis methods to identify the failure mechanism at circuit level in an integrated chip. This paper demonstrates the utilization of nanoprobing for on-chip device and circuit debugging for defect localization at circuit level. FIB circuit edit was first performed to isolate the intended circuit. Next nanoprobing was performed on higher metal layer to identify the cause of failure. Nanoprobing was then performed at the contact level to verify the source of failure.