J. Leray, J. Baggio, V. Ferlet-Cavrois, O. Flament
{"title":"Atmospheric neutron effects in advanced microelectronics, standards and applications","authors":"J. Leray, J. Baggio, V. Ferlet-Cavrois, O. Flament","doi":"10.1109/ICICDT.2004.1309974","DOIUrl":null,"url":null,"abstract":"Since the 80s it is known that Terrestrial Cosmic Rays, mainly reported as Atmospheric Neutrons, can penetrate the natural shielding of buildings, equipments and circuit package and induce Soft Errors in integrated circuits and Breakdown of power devices. The high-energy neutron fluxes of interest range between 10 particles/cm/sup 2//hour at sea level and 10/sup 4/ particles/cm/sup 2//hour at typical airplanes flight altitude of 30000 feet, with modulation due to Solar Flares. In the 90s the phenomenon has pervaded as a consequence of the roadmap of electronic devices, especially downscaling of design rules, increase of signal bandwidth and increase of the size of DRAM and SRAM memory, standalone or embedded on processors and System-on-Chips. Failure-In-Time and Soft Error Rate became unacceptable. Test Standards and design solutions have been proposed to maintain reliability of commercial products and improve those used in special such as avionic computers. The paper describes the Atmospheric Neutron flux, the effects in the main classes of devices and specific cases such as neutron-induced single event upset observed in CMOS vs. CMOS/SOI and some mitigation issues. A model called CCPM (Critical Cross-Point Model) is proposed to provide critical graphs of technology node sensitivity along the scaling trend of CMOS.","PeriodicalId":158994,"journal":{"name":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","volume":"85 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2004.1309974","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
Since the 80s it is known that Terrestrial Cosmic Rays, mainly reported as Atmospheric Neutrons, can penetrate the natural shielding of buildings, equipments and circuit package and induce Soft Errors in integrated circuits and Breakdown of power devices. The high-energy neutron fluxes of interest range between 10 particles/cm/sup 2//hour at sea level and 10/sup 4/ particles/cm/sup 2//hour at typical airplanes flight altitude of 30000 feet, with modulation due to Solar Flares. In the 90s the phenomenon has pervaded as a consequence of the roadmap of electronic devices, especially downscaling of design rules, increase of signal bandwidth and increase of the size of DRAM and SRAM memory, standalone or embedded on processors and System-on-Chips. Failure-In-Time and Soft Error Rate became unacceptable. Test Standards and design solutions have been proposed to maintain reliability of commercial products and improve those used in special such as avionic computers. The paper describes the Atmospheric Neutron flux, the effects in the main classes of devices and specific cases such as neutron-induced single event upset observed in CMOS vs. CMOS/SOI and some mitigation issues. A model called CCPM (Critical Cross-Point Model) is proposed to provide critical graphs of technology node sensitivity along the scaling trend of CMOS.